
#ifndef	_HTC_H_
#warning Header file pageone.h included directly. Use #include <htc.h> instead.
#endif

/* This is a header file for the Winedge Microcontroller
	PAGEONE
*/

#ifndef __PAGEONE_H
#define __PAGEONE_H


typedef struct {
	unsigned B7:1; //This is the most signifigant bit
	unsigned B6:1;
	unsigned B5:1;
	unsigned B4:1;
	unsigned B3:1;
	unsigned B2:1;
	unsigned B1:1;
	unsigned B0:1;
}	SFR_BITS;

//Special Function Registers
static volatile unsigned char P0	@ 0x80;
static volatile unsigned char SP	@ 0x81;
static volatile unsigned char DPL	@ 0x82;
static volatile unsigned char DPH	@ 0x83;
// 16 bit definition
static volatile unsigned char PCON	@ 0x87;
static volatile unsigned char TCON	@ 0x88;
static		unsigned char TMOD	@ 0x89;
static volatile unsigned char TL0	@ 0x8A;
static volatile unsigned char TL1	@ 0x8B;
static volatile unsigned char TH0	@ 0x8C;
static volatile unsigned char TH1	@ 0x8D;
static volatile unsigned char P1	@ 0x90;
static volatile unsigned char SCON	@ 0x98;
static volatile unsigned char SBUF	@ 0x99;
static		unsigned char PAGETYPE	@ 0x9A;
static		unsigned char PAGEA	@ 0x9B;
static		unsigned char PAGEB	@ 0x9C;
static		unsigned char PAGEC	@ 0x9D;
static volatile unsigned char WDTRST	@ 0x9F;
static volatile unsigned char P2	@ 0xA0;
static		unsigned char DPSEL	@ 0xA2;
static volatile unsigned char P0_DIR	@ 0xA4;
static volatile unsigned char P1_DIR	@ 0xA5;
static volatile unsigned char P2_DIR	@ 0xA6;
static volatile unsigned char P3_DIR	@ 0xA7;
static		unsigned char IE	@ 0xA8;
static		unsigned char CSMCON	@ 0xA9;
static		unsigned char CSMRBS	@ 0xAA;
static		unsigned char KBIRQSEL	@ 0xAB;
static		unsigned char P0ALT	@ 0xAC;
static		unsigned char P1ALT	@ 0xAD;
static		unsigned char P2ALT	@ 0xAE;
static		unsigned char P3ALT	@ 0xAF;
static volatile unsigned char P3	@ 0xB0;
static		unsigned char IP	@ 0xB8;
static volatile unsigned char MR0	@ 0xC0;
static volatile unsigned char MR1	@ 0xC1;
static volatile unsigned char MR2	@ 0xC2;
static volatile unsigned char MR3	@ 0xC3;
static volatile unsigned char MR4	@ 0xC4;
static		unsigned char INSTRSEL	@ 0xC5;
static volatile unsigned char T2CON	@ 0xC8;
static volatile unsigned char RCAP2L	@ 0xCA;
static volatile unsigned char RCAP2H	@ 0xCB;
static volatile unsigned char TL2	@ 0xCC;
static volatile unsigned char TH2	@ 0xCD;
static volatile unsigned char PSW	@ 0xD0;
static volatile unsigned char SIO1BUF	@ 0xD3;
static volatile unsigned char SIO1CON	@ 0xD4;
static		unsigned char SIO1BAUD	@ 0xD5;
static volatile unsigned char SIO1CON2	@ 0xD6;
static volatile unsigned char SIO1FIFOSR @ 0xD7;
static volatile unsigned char PIF	@ 0xD8;
static volatile unsigned char SIO2BUF	@ 0xDB;
static volatile unsigned char SIO2CON	@ 0xDC;
static		unsigned char SIO2BAUD	@ 0xDD;
static volatile unsigned char SIO2CON2	@ 0xDE;
static volatile unsigned char SIO2FIFOSR @ 0xDF;
static volatile unsigned char ACC	@ 0xE0;
static volatile unsigned char MLDDF	@ 0xE1;
static		unsigned char MLDIXR	@ 0xE2;
static volatile unsigned char MLDCR	@ 0xE3;
static volatile unsigned char ADCCON	@ 0xE4;
static volatile unsigned char ADCBUF	@ 0xE5;
static		unsigned char PIE	@ 0xE8;
static		unsigned char POCIXR	@ 0xE9;
static volatile unsigned char POCFDB	@ 0xEA;
static volatile unsigned char POCDATA	@ 0xEB;
static volatile unsigned char POCDATB	@ 0xEC;
static volatile unsigned char POCDATC	@ 0xED;
static volatile unsigned char POCMSGR	@ 0xEE;
static volatile unsigned char POCDECR	@ 0xEF;
static volatile unsigned char B		@ 0xF0;
static volatile unsigned char RTCCR	@ 0xF1;
static		unsigned char RTCIR	@ 0xF2;
static volatile unsigned char RTCDR	@ 0xF3;
static volatile unsigned char KEYCODE0	@ 0xF5;
static volatile unsigned char KEYCODE1	@ 0xF6;
static volatile unsigned char KEYCODE2	@ 0xF7;
static		unsigned char PIP	@ 0xF8;

static volatile SFR_BITS P0_BITS		@ 0x80;
static volatile SFR_BITS PCON_BITS		@ 0x87;
static volatile SFR_BITS TCON_BITS		@ 0x88;
static		SFR_BITS TMOD_BITS		@ 0x89;
static volatile SFR_BITS P1_BITS		@ 0x90;
static volatile SFR_BITS SCON_BITS		@ 0x98;
static		SFR_BITS PAGETYPE_BITS		@ 0x9A;
static		SFR_BITS PAGEA_BITS		@ 0x9B;
static		SFR_BITS PAGEB_BITS		@ 0x9C;
static		SFR_BITS PAGEC_BITS		@ 0x9D;
static volatile SFR_BITS P2_BITS		@ 0xA0;
static		SFR_BITS DPSEL_BITS		@ 0xA2;
static		SFR_BITS P0_DIR_BITS		@ 0xA4;
static		SFR_BITS P1_DIR_BITS		@ 0xA5;
static		SFR_BITS P2_DIR_BITS		@ 0xA6;
static		SFR_BITS P3_DIR_BITS		@ 0xA7;
static		SFR_BITS IE_BITS		@ 0xA8;
static		SFR_BITS CSMCON_BITS		@ 0xA9;
static		SFR_BITS CSMRBS_BITS		@ 0xAA;
static		SFR_BITS KBIRQSEL_BITS		@ 0xAB;
static		SFR_BITS P0ALT_BITS		@ 0xAC;
static		SFR_BITS P1ALT_BITS		@ 0xAD;
static		SFR_BITS P2ALT_BITS		@ 0xAE;
static		SFR_BITS P3ALT_BITS		@ 0xAF;
static volatile SFR_BITS P3_BITS		@ 0xB0;
static		SFR_BITS IP_BITS		@ 0xB8;
static		SFR_BITS INSTRSEL_BITS		@ 0xC5;
static volatile SFR_BITS T2CON_BITS		@ 0xC8;
static volatile SFR_BITS PSW_BITS		@ 0xD0;
static volatile SFR_BITS SIO1CON_BITS		@ 0xD4;
static		SFR_BITS SIO1BAUD_BITS		@ 0xD5;
static volatile SFR_BITS SIO1CON2_BITS		@ 0xD6;
static volatile SFR_BITS SIO1FIFOSR_BITS	@ 0xD7;
static volatile SFR_BITS PIF_BITS		@ 0xD8;
static volatile SFR_BITS SIO2CON_BITS		@ 0xDC;
static		SFR_BITS SIO2BAUD_BITS		@ 0xDD;
static volatile SFR_BITS SIO2CON2_BITS		@ 0xDE;
static volatile SFR_BITS SIO2FIFOSR_BITS	@ 0xDF;
static volatile SFR_BITS ACC_BITS		@ 0xE0;
static volatile SFR_BITS MLDDF_BITS		@ 0xE1;
static		SFR_BITS MLDIXR_BITS		@ 0xE2;
static volatile SFR_BITS MLDCR_BITS		@ 0xE3;
static volatile SFR_BITS ADCCON_BITS		@ 0xE4;
static		SFR_BITS PIE_BITS		@ 0xE8;
static		SFR_BITS POCIXR_BITS		@ 0xE9;
static volatile SFR_BITS POCFDB_BITS		@ 0xEA;
static volatile SFR_BITS POCMSGR_BITS		@ 0xEE;
static volatile SFR_BITS POCDECR_BITS		@ 0xEF;
static volatile SFR_BITS B_BITS			@ 0xF0;
static volatile SFR_BITS RTCCR_BITS		@ 0xF1;
static		SFR_BITS RTCIR_BITS		@ 0xF2;
static volatile SFR_BITS RTCDR_BITS		@ 0xF3;
static volatile SFR_BITS KEYCODE0_BITS		@ 0xF5;
static volatile SFR_BITS KEYCODE1_BITS		@ 0xF6;
static volatile SFR_BITS KEYCODE2_BITS		@ 0xF7;
static		SFR_BITS PIP_BITS		@ 0xF8;

//Bit Addressable Locations
//Port 0 P0
static volatile bit	P00	@ 0x80;
static volatile bit	P01	@ 0x81;
static volatile bit	P02	@ 0x82;
static volatile bit	P03	@ 0x83;
static volatile bit	P04	@ 0x84;
static volatile bit	P05	@ 0x85;
static volatile bit	P06	@ 0x86;
static volatile bit	P07	@ 0x87;

//Timer Control TCON
static 		bit	IT0	@ 0x88;
static volatile bit	IE0	@ 0x89;
static 		bit	IT1	@ 0x8A;
static volatile bit	IE1	@ 0x8B;
static 		bit	TR0	@ 0x8C;
static volatile bit	TF0	@ 0x8D;
static 		bit	TR1	@ 0x8E;
static volatile bit	TF1	@ 0x8F;

//Port 1 P1
static volatile bit	P10	@ 0x90;
static volatile bit	P11	@ 0x91;
static volatile bit	P12	@ 0x92;
static volatile bit	P13	@ 0x93;
static volatile bit	P14	@ 0x94;
static volatile bit	P15	@ 0x95;
static volatile bit	P16	@ 0x96;
static volatile bit	P17	@ 0x97;

//Serial Control SCON
static volatile bit	RI	@ 0x98;
static volatile bit	TI	@ 0x99;
static volatile bit	RB8	@ 0x9A;
static		bit	TB8	@ 0x9B;
static 		bit	REN	@ 0x9C;
static		bit	SM2	@ 0x9D;
static		bit	SM1	@ 0x9E;
static		bit	SM0	@ 0x9F;

//Port 2 P2
static volatile bit	P20	@ 0xA0;
static volatile bit	P21	@ 0xA1;
static volatile bit	P22	@ 0xA2;
static volatile bit	P23	@ 0xA3;
static volatile bit	P24	@ 0xA4;
static volatile bit	P25	@ 0xA5;
static volatile bit	P26	@ 0xA6;
static volatile bit	P27	@ 0xA7;

//Interrupt Enable IE
static		bit	EX0	@ 0xA8;
static		bit	ET0	@ 0xA9;
static		bit	EX1	@ 0xAA;
static		bit	ET1	@ 0xAB;
static 		bit	ES	@ 0xAC;
static 		bit	ET2	@ 0xAD;
static 		bit	EA	@ 0xAF;

//Port 3 P3
static volatile bit	P30	@ 0xB0;
static volatile bit	P31	@ 0xB1;
static volatile bit	P32	@ 0xB2;
static volatile bit	P33	@ 0xB3;
static volatile bit	P34	@ 0xB4;
static volatile bit	P35	@ 0xB5;
static volatile bit	P36	@ 0xB6;
static volatile bit	P37	@ 0xB7;

//Interrupt Priority
static 		bit	PX0	@ 0xB8;
static 		bit	PT0	@ 0xB9;
static 		bit	PX1	@ 0xBA;
static 		bit	PT1	@ 0xBB;
static 		bit	PS	@ 0xBC;
static 		bit	PT2	@ 0xBD;

//Timer 2 Control T2CON
static 		bit	CPRL2	@ 0xC8;
static 		bit	CT2	@ 0xC9;
static 		bit	TR2	@ 0xCA;
static 		bit	EXEN2	@ 0xCB;
static		bit	TCLK	@ 0xCC;
static		bit	RCLK	@ 0xCD;
static volatile	bit	EXF2	@ 0xCE;
static volatile	bit	TF2	@ 0xCF;

//Program Status Word PSW
static volatile bit	P	@ 0xD0;
static volatile bit	OV	@ 0xD2;
static 		bit	RS0	@ 0xD3;
static 		bit	RS1	@ 0xD4;
static volatile bit	F0	@ 0xD5;
static volatile bit	AC	@ 0xD6;
static volatile bit	CY	@ 0xD7;

// Peripheral Interrupt Flag Register PIF
static		bit	POCSAGIF @ 0xD8;
static		bit	SIO1IF	@ 0xD9;
static		bit	SIO2IF	@ 0xDA;
static		bit	MLDIF	@ 0xDB;
static		bit	RTCIF	@ 0xDC;
static		bit	ADCIF	@ 0xDD;
static		bit	KEYIF	@ 0xDE;

//Accumulator ACC
static volatile bit	ACC0	@ 0xE0;
static volatile bit	ACC1	@ 0xE1;
static volatile bit	ACC2	@ 0xE2;
static volatile bit	ACC3	@ 0xE3;
static volatile bit	ACC4	@ 0xE4;
static volatile bit	ACC5	@ 0xE5;
static volatile bit	ACC6	@ 0xE6;
static volatile bit	ACC7	@ 0xE7;

// Peripheral Interrupt Enable PIE
static		bit	POCSAGIE @ 0xE8;
static		bit	SIO1IE	@ 0xE9;
static		bit	SIO2IE	@ 0xEA;
static		bit	MLDIE	@ 0xEB;
static		bit	RTCIE	@ 0xEC;
static		bit	ADCIE	@ 0xED;
static		bit	KEYIE	@ 0xEE;

//B register
static volatile bit	B0	@ 0xF0;
static volatile bit	B1	@ 0xF1;
static volatile bit	B2	@ 0xF2;
static volatile bit	B3	@ 0xF3;
static volatile bit	B4	@ 0xF4;
static volatile bit	B5	@ 0xF5;
static volatile bit	B6	@ 0xF6;
static volatile bit	B7	@ 0xF7;

// Peripheral Interrupt priority PIP
static		bit	POCSAGIP @ 0xF8;
static		bit	SIO1IP	@ 0xF9;
static		bit	SIO2IP	@ 0xFA;
static		bit	MLDIP	@ 0xFB;
static		bit	RTCIP	@ 0xFC;
static		bit	ADCIP	@ 0xFD;
static		bit	KEYIP	@ 0xFE;


//Interrupt Vectors
#define	RESET	0
#define	EXTINT0	0x03
#define TIMER0	0x0B
#define	EXTINT1	0x13
#define	TIMER1	0x1B
#define	SERIAL	0x23
#define	TIMER2	0x2B
#define POCSAG	0x33
#define SIO1	0x3B
#define SIO2	0x43
#define MELODY	0x4B
#define RTC	0x53
#define ADC	0x5B
#define KB	0x63
#define TRAP	0x73
#endif
