
#ifndef	_HTC_H_
#warning Header file pic1678x.h included directly. Use #include <htc.h> instead.
#endif

/* 
 *	Header file for the Microchip
 *	PIC 16C781 chip
 *	PIC 16C782 chip
 */

//Special Function Registers
//Bank 0
static volatile unsigned char INDF	@ 0x00;
static volatile unsigned char TMR0	@ 0x01;
static volatile unsigned char PCL	@ 0x02;
static volatile unsigned char STATUS	@ 0x03;
static 		unsigned char FSR	@ 0x04;
static volatile unsigned char PORTA	@ 0x05;
static volatile unsigned char PORTB	@ 0x06;
static 		unsigned char PCLATH	@ 0x0A;
static volatile unsigned char INTCON	@ 0x0B;
static volatile unsigned char PIR1	@ 0x0C;
static volatile unsigned char TMR1L	@ 0x0E;
static volatile unsigned char TMR1H	@ 0x0F;
static volatile unsigned char T1CON	@ 0x10;
static volatile unsigned char ADRES	@ 0x1E;
static volatile unsigned char ADCON0	@ 0x1F;

//Bank 1
static		unsigned char bank1 OPTION	@ 0x81;
static		unsigned char bank1 TRISA	@ 0x85;
static		unsigned char bank1 TRISB	@ 0x86;
static		unsigned char bank1 PIE1	@ 0x8C;
static volatile unsigned char bank1 PCON	@ 0x8E;
static		unsigned char bank1 WPUB	@ 0x95;
static		unsigned char bank1 IOCB	@ 0x96;
static		unsigned char bank1 REFCON	@ 0x9B;
static volatile unsigned char bank1 LVDCON	@ 0x9C;
static		unsigned char bank1 ANSEL	@ 0x9D;
static		unsigned char bank1 ADCON1	@ 0x9F;

//Bank 2
static volatile unsigned char bank2 PMDATL	@ 0x10C;
static		unsigned char bank2 PMADRL	@ 0x10D;
static volatile unsigned char bank2 PMDATH	@ 0x10E;
static		unsigned char bank2 PMADRH	@ 0x10F;
static volatile unsigned char bank2 CALCON	@ 0x110;
static		unsigned char bank2 PSMCCON0	@ 0x111;
static		unsigned char bank2 PSMCCON1	@ 0x112;
static volatile unsigned char bank2 CM1CON0	@ 0x119;
static volatile unsigned char bank2 CM2CON0	@ 0x11A;
static volatile unsigned char bank2 CM2CON1	@ 0x11B;
static		unsigned char bank2 OPACON	@ 0x11C;
static volatile unsigned char bank2 DAC		@ 0x11E;
static		unsigned char bank2 DACON0	@ 0x11F;

//Bank 3
static volatile unsigned char bank3 PMCON1	@ 0x18C;

//Special Function Bits
/*	STATUS bits	*/
static volatile bit	IRP	@ (unsigned)&STATUS*8+7;
static volatile bit	RP1	@ (unsigned)&STATUS*8+6;
static volatile bit	RP0	@ (unsigned)&STATUS*8+5;
static volatile bit	TO	@ (unsigned)&STATUS*8+4;
static volatile bit	PD	@ (unsigned)&STATUS*8+3;
static volatile bit	ZERO	@ (unsigned)&STATUS*8+2;
static volatile bit	DC	@ (unsigned)&STATUS*8+1;
static volatile bit	CARRY	@ (unsigned)&STATUS*8+0;

/*	INTCON bits	*/
static		bit	GIE	@ (unsigned)&INTCON*8+7;
static		bit	PEIE	@ (unsigned)&INTCON*8+6;
static		bit	T0IE	@ (unsigned)&INTCON*8+5;
static		bit	INTE	@ (unsigned)&INTCON*8+4;
static		bit	RBIE	@ (unsigned)&INTCON*8+3;
static volatile bit	T0IF	@ (unsigned)&INTCON*8+2;
static volatile bit	INTF	@ (unsigned)&INTCON*8+1;
static volatile bit	RBIF	@ (unsigned)&INTCON*8+0;

//Bank 0
/*	PORTA bits	*/
static volatile bit	RA7	@ (unsigned)&PORTA*8+7;
static volatile bit	RA6	@ (unsigned)&PORTA*8+6;
static volatile bit	RA5	@ (unsigned)&PORTA*8+5;
static volatile bit	RA4	@ (unsigned)&PORTA*8+4;
static volatile bit	RA3	@ (unsigned)&PORTA*8+3;
static volatile bit	RA2	@ (unsigned)&PORTA*8+2;
static volatile bit	RA1	@ (unsigned)&PORTA*8+1;
static volatile bit	RA0	@ (unsigned)&PORTA*8+0;

/*	PORTB bits	*/
static volatile bit	RB7	@ (unsigned)&PORTB*8+7;
static volatile bit	RB6	@ (unsigned)&PORTB*8+6;
static volatile bit	RB5	@ (unsigned)&PORTB*8+5;
static volatile bit	RB4	@ (unsigned)&PORTB*8+4;
static volatile bit	RB3	@ (unsigned)&PORTB*8+3;
static volatile bit	RB2	@ (unsigned)&PORTB*8+2;
static volatile bit	RB1	@ (unsigned)&PORTB*8+1;
static volatile bit	RB0	@ (unsigned)&PORTB*8+0;

/*	PIR1 bits	*/
static volatile bit	LVDIF	@ (unsigned)&PIR1*8+7;
static volatile bit	ADIF	@ (unsigned)&PIR1*8+6;
static volatile bit	C2IF	@ (unsigned)&PIR1*8+5;
static volatile bit	C1IF	@ (unsigned)&PIR1*8+4;
static volatile bit	TMR1IF	@ (unsigned)&PIR1*8+0;

/*	T1CON bits	*/
static		bit	TMR1GE	@ (unsigned)&T1CON*8+6;
static		bit	T1CKPS1	@ (unsigned)&T1CON*8+5;
static		bit	T1CKPS0	@ (unsigned)&T1CON*8+4;
static		bit	T1OSCEN	@ (unsigned)&T1CON*8+3;
static		bit	T1SYNC 	@ (unsigned)&T1CON*8+2;
static		bit	TMR1CS 	@ (unsigned)&T1CON*8+1;
static		bit	TMR1ON 	@ (unsigned)&T1CON*8+0;

/*	ADCON0 bits	*/
static		bit	ADCS1 	@ (unsigned)&ADCON0*8+7;
static		bit	ADCS0 	@ (unsigned)&ADCON0*8+6;
static		bit	CHS2 	@ (unsigned)&ADCON0*8+5;
static		bit	CHS1 	@ (unsigned)&ADCON0*8+4;
static		bit	CHS0 	@ (unsigned)&ADCON0*8+3;
static volatile bit	GODONE	@ (unsigned)&ADCON0*8+2;
static		bit	CHS3 	@ (unsigned)&ADCON0*8+1;
static		bit	ADON 	@ (unsigned)&ADCON0*8+0;

// Bank 1
/* 	OPTION bits	*/
static 		bank1 bit	RBPU	@ (unsigned)&OPTION*8+7;
static 		bank1 bit	INTEDG	@ (unsigned)&OPTION*8+6;
static 		bank1 bit	T0CS	@ (unsigned)&OPTION*8+5;
static 		bank1 bit	T0SE	@ (unsigned)&OPTION*8+4;
static 		bank1 bit	PSA	@ (unsigned)&OPTION*8+3;
static 		bank1 bit	PS2	@ (unsigned)&OPTION*8+2;
static 		bank1 bit	PS1	@ (unsigned)&OPTION*8+1;
static 		bank1 bit	PS0	@ (unsigned)&OPTION*8+0;

/*	TRISA bits	*/
static		bank1 bit	TRISA7	@ (unsigned)&TRISA*8+7;
static		bank1 bit	TRISA6	@ (unsigned)&TRISA*8+6;
static		bank1 bit	TRISA5	@ (unsigned)&TRISA*8+5;
static		bank1 bit	TRISA4	@ (unsigned)&TRISA*8+4;
static		bank1 bit	TRISA3	@ (unsigned)&TRISA*8+3;
static		bank1 bit	TRISA2	@ (unsigned)&TRISA*8+2;
static		bank1 bit	TRISA1	@ (unsigned)&TRISA*8+1;
static		bank1 bit	TRISA0	@ (unsigned)&TRISA*8+0;

/*	TRISB bits	*/
static		bank1 bit	TRISB7	@ (unsigned)&TRISB*8+7;
static		bank1 bit	TRISB6	@ (unsigned)&TRISB*8+6;
static		bank1 bit	TRISB5	@ (unsigned)&TRISB*8+5;
static		bank1 bit	TRISB4	@ (unsigned)&TRISB*8+4;
static		bank1 bit	TRISB3	@ (unsigned)&TRISB*8+3;
static		bank1 bit	TRISB2	@ (unsigned)&TRISB*8+2;
static		bank1 bit	TRISB1	@ (unsigned)&TRISB*8+1;
static		bank1 bit	TRISB0	@ (unsigned)&TRISB*8+0;

/*	PIE1 bits	*/
static		bank1 bit	LVDIE	@ (unsigned)&PIE1*8+7;
static		bank1 bit	ADIE	@ (unsigned)&PIE1*8+6;
static		bank1 bit	C2IE	@ (unsigned)&PIE1*8+5;
static		bank1 bit	C1IE	@ (unsigned)&PIE1*8+4;
static		bank1 bit	TMR1IE	@ (unsigned)&PIE1*8+0;

/*	PCON bits	*/
static volatile bank1 bit	WDTCON	@ (unsigned)&PCON*8+4;	
static		bank1 bit	OSCF	@ (unsigned)&PCON*8+3;	
static volatile bank1 bit	POR	@ (unsigned)&PCON*8+1;	
static volatile bank1 bit	BOR	@ (unsigned)&PCON*8+0;

/*	REFCON bits	*/
static		bank1 bit	VREN	@ (unsigned)&REFCON*8+3;
static		bank1 bit	VROE	@ (unsigned)&REFCON*8+2;

/*	LVDCON bits	*/
static volatile bank1 bit	BGST	@ (unsigned)&LVDCON*8+5;
static		bank1 bit	LVDEN	@ (unsigned)&LVDCON*8+4;
static		bank1 bit	LV3	@ (unsigned)&LVDCON*8+3;
static		bank1 bit	LV2	@ (unsigned)&LVDCON*8+2;
static		bank1 bit	LV1	@ (unsigned)&LVDCON*8+1;
static		bank1 bit	LV0	@ (unsigned)&LVDCON*8+0;

/*	ADCON1 bits	*/
static		bank1 bit	VCFG1	@ (unsigned)&ADCON1*8+5;
static		bank1 bit	VCFG0	@ (unsigned)&ADCON1*8+4;

// BANK 2
/*	PMDATL Bits	*/
static volatile bank2 bit	PMD7	@ (unsigned)&PMDATL*8+7;
static volatile bank2 bit	PMD6	@ (unsigned)&PMDATL*8+6;
static volatile bank2 bit	PMD5	@ (unsigned)&PMDATL*8+5;
static volatile bank2 bit	PMD4	@ (unsigned)&PMDATL*8+4;
static volatile bank2 bit	PMD3	@ (unsigned)&PMDATL*8+3;
static volatile bank2 bit	PMD2	@ (unsigned)&PMDATL*8+2;
static volatile bank2 bit	PMD1	@ (unsigned)&PMDATL*8+1;
static volatile bank2 bit	PMD0	@ (unsigned)&PMDATL*8+0;

/*	PMADRL Bits	*/
static		bank2 bit	PMA7	@ (unsigned)&PMADRL*8+7;
static		bank2 bit	PMA6	@ (unsigned)&PMADRL*8+6;
static		bank2 bit	PMA5	@ (unsigned)&PMADRL*8+5;
static		bank2 bit	PMA4	@ (unsigned)&PMADRL*8+4;
static		bank2 bit	PMA3	@ (unsigned)&PMADRL*8+3;
static		bank2 bit	PMA2	@ (unsigned)&PMADRL*8+2;
static		bank2 bit	PMA1	@ (unsigned)&PMADRL*8+1;
static		bank2 bit	PMA0	@ (unsigned)&PMADRL*8+0;

/*	PMDATH Bits	*/
static volatile bank2 bit	PMD13	@ (unsigned)&PMDATH*8+5;
static volatile bank2 bit	PMD12	@ (unsigned)&PMDATH*8+4;
static volatile bank2 bit	PMD11	@ (unsigned)&PMDATH*8+3;
static volatile bank2 bit	PMD10	@ (unsigned)&PMDATH*8+2;
static volatile bank2 bit	PMD9	@ (unsigned)&PMDATH*8+1;
static volatile bank2 bit	PMD8	@ (unsigned)&PMDATH*8+0;

/*	PMADRH Bits	*/
static		bank2 bit	PMA10	@ (unsigned)&PMADRH*8+2;
static		bank2 bit	PMA9	@ (unsigned)&PMADRH*8+1;
static		bank2 bit	PMA8	@ (unsigned)&PMADRH*8+0;

/*	CALCON Bits	*/
static volatile bank2 bit	CAL	@ (unsigned)&CALCON*8+7;
static volatile bank2 bit	CALERR	@ (unsigned)&CALCON*8+6;
static		bank2 bit	CALREF	@ (unsigned)&CALCON*8+5;

/*	PSMCCON0	*/
static		bank2 bit	SMCCL1	@ (unsigned)&PSMCCON0*8+7;
static		bank2 bit	SMCCL0	@ (unsigned)&PSMCCON0*8+6;
static		bank2 bit	MINDC1	@ (unsigned)&PSMCCON0*8+5;
static		bank2 bit	MINDC0	@ (unsigned)&PSMCCON0*8+4;
static		bank2 bit	MAXDC1	@ (unsigned)&PSMCCON0*8+3;
static		bank2 bit	MAXDC0	@ (unsigned)&PSMCCON0*8+2;
static		bank2 bit	DC1	@ (unsigned)&PSMCCON0*8+1;
static		bank2 bit	DC0	@ (unsigned)&PSMCCON0*8+0;

/*	PSMCCON1	*/
static		bank2 bit	SMCON	@ (unsigned)&PSMCCON1*8+7;
static		bank2 bit	S1APOL	@ (unsigned)&PSMCCON1*8+6;
static		bank2 bit	S1BPOL	@ (unsigned)&PSMCCON1*8+5;
static		bank2 bit	SCEN	@ (unsigned)&PSMCCON1*8+3;
static		bank2 bit	SMCOM	@ (unsigned)&PSMCCON1*8+2;
static		bank2 bit	PWMPSM	@ (unsigned)&PSMCCON1*8+1;
static		bank2 bit	SMCCS	@ (unsigned)&PSMCCON1*8+0;

/*	CM1CON0	Bits	*/
static		bank2 bit	C1ON	@ (unsigned)&CM1CON0*8+7;
static volatile bank2 bit	C1OUT	@ (unsigned)&CM1CON0*8+6;
static		bank2 bit	C1OE	@ (unsigned)&CM1CON0*8+5;
static		bank2 bit	C1POL	@ (unsigned)&CM1CON0*8+4;
static		bank2 bit	C1SP	@ (unsigned)&CM1CON0*8+3;
static		bank2 bit	C1R	@ (unsigned)&CM1CON0*8+2;
static		bank2 bit	C1CH1	@ (unsigned)&CM1CON0*8+1;
static		bank2 bit	C1CH0	@ (unsigned)&CM1CON0*8+0;

/*	CM2CON0	Bits	*/
static		bank2 bit	C2ON	@ (unsigned)&CM2CON0*8+7;
static volatile bank2 bit	C2OUT	@ (unsigned)&CM2CON0*8+6;
static		bank2 bit	C2OE	@ (unsigned)&CM2CON0*8+5;
static		bank2 bit	C2POL	@ (unsigned)&CM2CON0*8+4;
static		bank2 bit	C2SP	@ (unsigned)&CM2CON0*8+3;
static		bank2 bit	C2R	@ (unsigned)&CM2CON0*8+2;
static		bank2 bit	C2CH1	@ (unsigned)&CM2CON0*8+1;
static		bank2 bit	C2CH0	@ (unsigned)&CM2CON0*8+0;

/*	CM2CON1	Bits	*/
static volatile bank2 bit	MC1OUT	@ (unsigned)&CM2CON1*8+7;
static volatile bank2 bit	MC2OUT	@ (unsigned)&CM2CON1*8+6;
static		bank2 bit	C2SYNC	@ (unsigned)&CM2CON1*8+0;

/*	OPACON	Bits	*/
static		bank2 bit	OPAON	@ (unsigned)&OPACON*8+7;
static		bank2 bit	CMPEN	@ (unsigned)&OPACON*8+6;
static		bank2 bit	GBWP	@ (unsigned)&OPACON*8+0;

/*	DAC Bits	*/
static volatile bank2 bit	DA7	@ (unsigned)&DAC*8+7;
static volatile bank2 bit	DA6	@ (unsigned)&DAC*8+6;
static volatile bank2 bit	DA5	@ (unsigned)&DAC*8+5;
static volatile bank2 bit	DA4	@ (unsigned)&DAC*8+4;
static volatile bank2 bit	DA3	@ (unsigned)&DAC*8+3;
static volatile bank2 bit	DA2	@ (unsigned)&DAC*8+2;
static volatile bank2 bit	DA1	@ (unsigned)&DAC*8+1;
static volatile bank2 bit	DA0	@ (unsigned)&DAC*8+0;

/*	DACON0 Bits	*/
static		bank2 bit	DAON	@ (unsigned)&DACON0*8+7;
static		bank2 bit	DAOE	@ (unsigned)&DACON0*8+6;
static		bank2 bit	DARS1	@ (unsigned)&DACON0*8+1;
static		bank2 bit	DARS0	@ (unsigned)&DACON0*8+0;

// Bank 3
/*	PMCON1 bits	*/
static volatile bank3 bit	RD	@ (unsigned)&PMCON1*8+0;


// definitions select memory reading macros in pic.h
#define EECON1	PMCON1
#define EEDATA	PMDATL
#define EEDATH	PMDATH
#define EEADRL	PMADRL
#define EEADRH	PMADRH


//Configurations
#define CONFIG_ADDR	0x2007

/*osc configurations*/
#define RCCLKO   	0x3FFF		//External RC with clockout available
#define RC              0x3FFE		//External RC
#define INTRCCLKO       0x3FFD		//Internal 4MHz/37kHz with clockout available
#define INTRC           0x3FFC		//Internal 4MHz/37kHz
#define EC              0x3FFB		//External Clock
#define HS              0x3FFA		//High speed crystal
#define XT              0x3FF9		//Crystal
#define LP              0x3FF8		//Low Power Crystal

/*watchdog*/
#define WDTEN		0x3FFF		// enable watchdog timer
#define WDTDIS		0x3FF7		// disable watchdog timer

/*brown out reset*/
#define BOREN		0x3FFF		// enable brown out detection
#define BORDIS		0x3FBF		// disable brown out detection

/* code protection */
#define UNPROTECT	0x3FFF		/* unprotected */
#define PROTECT		0x0CFF		/* all memory code is protected */

/*Power Up Timer Reset*/
#define PWRTEN		0x3FEF		// enable power up timer
#define PWRTDIS		0x3FFF		// disable power up timer

/* MCLR pin function select */
#define MCLREN		0x3FFF		//MCLR pin set as MCLR
#define MCLRDIS		0x3FBF		//MCLR pin set as digital input
//alternately
#define MCLR		0x3FFF		//use MCLREN
#define MCLRDI		0x3FBF		//use MCLRDIS

/* Brown Out Reset Voltage Level */
#define BORV45		0x33FF		// brown out reset voltage is 4.5 Volts
#define BORV42		0x37FF		// brown out reset voltage is 4.2 Volts
#define BORV27		0x3BFF		// brown out reset voltage is 2.7 Volts
#define BORV25		0x3FFF		// brown out reset voltage is 2.5 Volts

