
#ifndef	_HTC_H_
#warning Header file pic166xx.h included directly. Use #include <htc.h> instead.
#endif

/*
 *	Header file for the Microchip :
 *	PIC 16C641 chip
 *	PIC 16C642 chip
 *	PIC 16C661 chip
 *	PIC 16C662 chip
 *	Midrange Microcontrollers
 */

static volatile unsigned char TRM0	@ 0x01;
static volatile unsigned char RTCC	@ 0x01;
static volatile unsigned char PCL	@ 0x02;
static volatile unsigned char STATUS	@ 0x03;
static          unsigned char FSR	@ 0x04;
static volatile unsigned char PORTA	@ 0x05;
static volatile unsigned char PORTB	@ 0x06;
static volatile unsigned char PORTC	@ 0x07;
static          unsigned char PCLATH	@ 0x0A;
static volatile unsigned char INTCON	@ 0x0B;
static volatile unsigned char PIR1	@ 0x0C;
static volatile unsigned char CMCON	@ 0x1F;

static          unsigned char bank1	OPTION	@ 0x81;
static volatile	unsigned char bank1	TRISA	@ 0x85;
static volatile	unsigned char bank1	TRISB	@ 0x86;
static volatile	unsigned char bank1	TRISC	@ 0x87;
static volatile unsigned char bank1	PIE1	@ 0x8C;
static volatile unsigned char bank1	PCON	@ 0x8E;
static volatile unsigned char bank1	VRCON	@ 0x9F;

#if defined(_16C661) || defined(_16C662)
	static volatile unsigned char PORTD	@ 0x08;
	static volatile unsigned char PORTE	@ 0x09;
        static volatile unsigned char bank1      TRISD   @ 0x88;
        static volatile unsigned char bank1      TRISE   @ 0x89;
	
	/*	PORTD bits	*/
	static volatile bit	RD7	@ (unsigned)&PORTD*8+7;
	static volatile bit	RD6	@ (unsigned)&PORTD*8+6;
	static volatile bit	RD5	@ (unsigned)&PORTD*8+5;
	static volatile bit	RD4	@ (unsigned)&PORTD*8+4;
	static volatile bit	RD3	@ (unsigned)&PORTD*8+3;
	static volatile bit	RD2	@ (unsigned)&PORTD*8+2;
	static volatile bit	RD1	@ (unsigned)&PORTD*8+1;
	static volatile bit	RD0	@ (unsigned)&PORTD*8+0;

	/*      PORTE bits      */
	static volatile bit      RE2     @ (unsigned)&PORTE*8+2;
	static volatile bit      RE1     @ (unsigned)&PORTE*8+1;
	static volatile bit      RE0     @ (unsigned)&PORTE*8+0;

        /*      TRISD bits      */
        static volatile bank1 bit        TRISD7  @ (unsigned)&TRISD*8+7;
        static volatile bank1 bit        TRISD6  @ (unsigned)&TRISD*8+6;
        static volatile bank1 bit        TRISD5  @ (unsigned)&TRISD*8+5;
        static volatile bank1 bit        TRISD4  @ (unsigned)&TRISD*8+4;
        static volatile bank1 bit        TRISD3  @ (unsigned)&TRISD*8+3;
        static volatile bank1 bit        TRISD2  @ (unsigned)&TRISD*8+2;
        static volatile bank1 bit        TRISD1  @ (unsigned)&TRISD*8+1;
        static volatile bank1 bit        TRISD0  @ (unsigned)&TRISD*8+0;

        /*      TRISE bits      */
        static volatile bank1 bit        IBF     @ (unsigned)&TRISE*8+7;
        static volatile bank1 bit        OBIF    @ (unsigned)&TRISE*8+6;
        static volatile bank1 bit        IBOV    @ (unsigned)&TRISE*8+5;
        static volatile bank1 bit        PSPMODE @ (unsigned)&TRISE*8+4;
        static volatile bank1 bit        TRISE2  @ (unsigned)&TRISE*8+2;
        static volatile bank1 bit        TRISE1  @ (unsigned)&TRISE*8+1;
        static volatile bank1 bit        TRISE0  @ (unsigned)&TRISE*8+0;

#endif  

/*	STATUS bits	*/
static volatile bit     RP0     @ (unsigned)&STATUS*8+5;
static volatile bit	TO	@ (unsigned)&STATUS*8+4;
static volatile bit	PD	@ (unsigned)&STATUS*8+3;
static volatile bit     ZERO    @ (unsigned)&STATUS*8+2;
static volatile bit     DC      @ (unsigned)&STATUS*8+1;
static volatile bit     CARRY   @ (unsigned)&STATUS*8+0;

/*	PORTA bits	*/
static volatile bit	RA5	@ (unsigned)&PORTA*8+5;
static volatile bit	RA4	@ (unsigned)&PORTA*8+4;
static volatile bit	RA3	@ (unsigned)&PORTA*8+3;
static volatile bit	RA2	@ (unsigned)&PORTA*8+2;
static volatile bit	RA1	@ (unsigned)&PORTA*8+1;
static volatile bit	RA0	@ (unsigned)&PORTA*8+0;

/*	PORTB bits	*/
static volatile bit	RB7	@ (unsigned)&PORTB*8+7;
static volatile bit	RB6	@ (unsigned)&PORTB*8+6;
static volatile bit	RB5	@ (unsigned)&PORTB*8+5;
static volatile bit	RB4	@ (unsigned)&PORTB*8+4;
static volatile bit	RB3	@ (unsigned)&PORTB*8+3;
static volatile bit	RB2	@ (unsigned)&PORTB*8+2;
static volatile bit	RB1	@ (unsigned)&PORTB*8+1;
static volatile bit	RB0	@ (unsigned)&PORTB*8+0;

/*	PORTC bits	*/
static volatile bit	RC7	@ (unsigned)&PORTC*8+7;
static volatile bit	RC6	@ (unsigned)&PORTC*8+6;
static volatile bit	RC5	@ (unsigned)&PORTC*8+5;
static volatile bit	RC4	@ (unsigned)&PORTC*8+4;
static volatile bit	RC3	@ (unsigned)&PORTC*8+3;
static volatile bit	RC2	@ (unsigned)&PORTC*8+2;
static volatile bit	RC1	@ (unsigned)&PORTC*8+1;
static volatile bit	RC0	@ (unsigned)&PORTC*8+0;

/*	INTCON bits	*/
static volatile bit	GIE	@ (unsigned)&INTCON*8+7;
static volatile bit	PEIE	@ (unsigned)&INTCON*8+6;
static volatile bit	T0IE	@ (unsigned)&INTCON*8+5;
static volatile bit	INTE	@ (unsigned)&INTCON*8+4;
static volatile bit	RBIE	@ (unsigned)&INTCON*8+3;
static volatile bit	T0IF	@ (unsigned)&INTCON*8+2;
static volatile bit	INTF	@ (unsigned)&INTCON*8+1;
static volatile bit	RBIF	@ (unsigned)&INTCON*8+0;

/*	PIR1 bits	*/
#if defined(_16C661) || defined(_16C662)
static volatile bit	PSPIF	@ (unsigned)&PIR1*8+7;
#endif  
static volatile bit	CMIF	@ (unsigned)&PIR1*8+6;

/*	CMCON bits	*/
static volatile bit 	C2OUT	@ (unsigned)&CMCON*8+7;
static volatile bit 	C1OUT	@ (unsigned)&CMCON*8+6;
static volatile bit 	CIS  	@ (unsigned)&CMCON*8+3;
static volatile bit 	CM2  	@ (unsigned)&CMCON*8+2;
static volatile bit 	CM1  	@ (unsigned)&CMCON*8+1;
static volatile bit 	CM0  	@ (unsigned)&CMCON*8+0;

/* 	OPTION bits	*/
static bank1 bit	RBPU	@ (unsigned)&OPTION*8+7;
static bank1 bit	INTEDG	@ (unsigned)&OPTION*8+6;
static bank1 bit	T0CS	@ (unsigned)&OPTION*8+5;
static bank1 bit	T0SE	@ (unsigned)&OPTION*8+4;
static bank1 bit	PSA	@ (unsigned)&OPTION*8+3;
static bank1 bit	PS2	@ (unsigned)&OPTION*8+2;
static bank1 bit	PS1	@ (unsigned)&OPTION*8+1;
static bank1 bit	PS0	@ (unsigned)&OPTION*8+0;

/*      TRISA bits      */
static volatile bank1 bit        TRISA5  @ (unsigned)&TRISA*8+5;
static volatile bank1 bit        TRISA4  @ (unsigned)&TRISA*8+4;
static volatile bank1 bit        TRISA3  @ (unsigned)&TRISA*8+3;
static volatile bank1 bit        TRISA2  @ (unsigned)&TRISA*8+2;
static volatile bank1 bit        TRISA1  @ (unsigned)&TRISA*8+1;
static volatile bank1 bit        TRISA0  @ (unsigned)&TRISA*8+0;

/*      TRISB bits      */
static volatile bank1 bit        TRISB7  @ (unsigned)&TRISB*8+7;
static volatile bank1 bit        TRISB6  @ (unsigned)&TRISB*8+6;
static volatile bank1 bit        TRISB5  @ (unsigned)&TRISB*8+5;
static volatile bank1 bit        TRISB4  @ (unsigned)&TRISB*8+4;
static volatile bank1 bit        TRISB3  @ (unsigned)&TRISB*8+3;
static volatile bank1 bit        TRISB2  @ (unsigned)&TRISB*8+2;
static volatile bank1 bit        TRISB1  @ (unsigned)&TRISB*8+1;
static volatile bank1 bit        TRISB0  @ (unsigned)&TRISB*8+0;

/*      TRISC bits      */
static volatile bank1 bit        TRISC7  @ (unsigned)&TRISC*8+7;
static volatile bank1 bit        TRISC6  @ (unsigned)&TRISC*8+6;
static volatile bank1 bit        TRISC5  @ (unsigned)&TRISC*8+5;
static volatile bank1 bit        TRISC4  @ (unsigned)&TRISC*8+4;
static volatile bank1 bit        TRISC3  @ (unsigned)&TRISC*8+3;
static volatile bank1 bit        TRISC2  @ (unsigned)&TRISC*8+2;
static volatile bank1 bit        TRISC1  @ (unsigned)&TRISC*8+1;
static volatile bank1 bit        TRISC0  @ (unsigned)&TRISC*8+0;

/*	PIE1 bits	*/
#if defined(_16C661) || defined(_16C662)
static volatile bank1 bit	PSPIE	@ (unsigned)&PIE1*8+7;
#endif  
static volatile bank1 bit	CMIE	@ (unsigned)&PIE1*8+6;

/*	PCON bits	*/
static volatile bank1 bit	MPECS	@ (unsigned)&PCON*8+7;	/* MPEEN */
static volatile bank1 bit	PER	@ (unsigned)&PCON*8+2;
static volatile bank1 bit	POR	@ (unsigned)&PCON*8+1;	
static volatile bank1 bit	BOR	@ (unsigned)&PCON*8+0;

/*	VRCON bits	*/
static volatile bank1 bit	VREN	@ (unsigned)&VRCON*8+7;
static volatile bank1 bit	VROE	@ (unsigned)&VRCON*8+6;
static volatile bank1 bit	VRR	@ (unsigned)&VRCON*8+5;
static volatile bank1 bit	VR3	@ (unsigned)&VRCON*8+3;
static volatile bank1 bit	VR2	@ (unsigned)&VRCON*8+2;
static volatile bank1 bit	VR1	@ (unsigned)&VRCON*8+1;
static volatile bank1 bit	VR0	@ (unsigned)&VRCON*8+0;

#define CONFIG_ADDR	0x2007

/*osc configurations*/
#define RC              0x3FFF	// resistor/capacitor
#define HS              0x3FFE	// high speed crystal/resonator
#define XT              0x3FFD	// crystal/resonator
#define LP              0x3FFC	// low power crystal/resonator

/*code protection*/
#define UNPROTECT	0x3FFF	// do not protect the code
#define PROTECT50	0x2AEF	// code protection 50%
#define PROTECT75	0x15DF	// code protection 75%
#define PROTECT		0x00CF	// code protection 100%

/*watchdog*/
#define WDTEN		0x3FFF	// enable watchdog timer
#define WDTDIS		0x3FFB	// disable watchdog timer

/*Power up timer*/
#define PWRTEN		0x3FF7	// enable power up timer
#define PWRTDIS		0x3FFF	// disable power up timer

/*Brown out reset*/
#define BOREN		0x3FFF	// enable brown out reset
#define BORDIS		0x3FBF	// diasble brown out reset

/*Memory Parity Error Enable*/
#define MPEEN		0x3FFF	// enable memory parity error
#define MPEDIS		0x3F7F	// disable memory parity error
