
#ifndef	_HTC_H_
#warning Header file pic169xx.h included directly. Use #include <htc.h> instead.
#endif

/*
 *	Header file for the Microchip
 *	PIC 16C923 chip
 *	PIC 16C924 chip
 *	PIC 16C925 chip
 *	PIC 16C926 chip
 *	Midrange Microcontroller
 */

static volatile unsigned char TMR0	@ 0x01;
static volatile unsigned char PCL	@ 0x02;
static volatile unsigned char STATUS	@ 0x03;
static          unsigned char FSR	@ 0x04;
static volatile unsigned char PORTA	@ 0x05;
static volatile unsigned char PORTB	@ 0x06;
static volatile unsigned char PORTC	@ 0x07;
static volatile unsigned char PORTD	@ 0x08;
static volatile unsigned char PORTE	@ 0x09;
static          unsigned char PCLATH	@ 0x0A;
static volatile unsigned char INTCON	@ 0x0B;
static volatile unsigned char PIR1	@ 0x0C;
static volatile unsigned char TMR1L	@ 0x0E;
static volatile unsigned char TMR1H	@ 0x0F;
static volatile unsigned char T1CON	@ 0x10;
static volatile unsigned char TMR2	@ 0x11;
static volatile unsigned char T2CON	@ 0x12;
static volatile unsigned char SSPBUF	@ 0x13;
static volatile unsigned char SSPCON	@ 0x14;
static volatile unsigned char CCPR1L	@ 0x15;
static volatile unsigned char CCPR1H	@ 0x16;
static volatile unsigned char CCP1CON	@ 0x17;

	/*  Bank 1  */
static          unsigned char bank1	OPTION	@ 0x81;
static volatile	unsigned char bank1	TRISA	@ 0x85;
static volatile	unsigned char bank1	TRISB	@ 0x86;
static volatile	unsigned char bank1	TRISC	@ 0x87;
static volatile	unsigned char bank1	TRISD	@ 0x88;
static volatile	unsigned char bank1	TRISE	@ 0x89;
static volatile unsigned char bank1	PIE1	@ 0x8C;
static volatile unsigned char bank1	PCON	@ 0x8E;
static volatile unsigned char bank1	PR2	@ 0x92;
static volatile unsigned char bank1	SSPADD	@ 0x93;
static volatile unsigned char bank1	SSPSTAT	@ 0x94;

	/*  Bank 2  */
static volatile unsigned char bank2	PORTF	@ 0x107;
static volatile unsigned char bank2	PORTG	@ 0x108;
static volatile unsigned char bank2	LCDSE	@ 0x10D;
static volatile unsigned char bank2	LCDPS	@ 0x10E;
static volatile unsigned char bank2	LCDCON	@ 0x10F;
static volatile unsigned char bank2	LCDD00	@ 0x110;
static volatile unsigned char bank2	LCDD01	@ 0x111;
static volatile unsigned char bank2	LCDD02	@ 0x112;
static volatile unsigned char bank2	LCDD03	@ 0x113;
static volatile unsigned char bank2	LCDD04	@ 0x114;
static volatile unsigned char bank2	LCDD05	@ 0x115;
static volatile unsigned char bank2	LCDD06	@ 0x116;
static volatile unsigned char bank2	LCDD07	@ 0x117;
static volatile unsigned char bank2	LCDD08	@ 0x118;
static volatile unsigned char bank2	LCDD09	@ 0x119;
static volatile unsigned char bank2	LCDD10	@ 0x11A;
static volatile unsigned char bank2	LCDD11	@ 0x11B;
static volatile unsigned char bank2	LCDD12	@ 0x11C;
static volatile unsigned char bank2	LCDD13	@ 0x11D;
static volatile unsigned char bank2	LCDD14	@ 0x11E;
static volatile unsigned char bank2	LCDD15	@ 0x11F;

	/*  Bank 3  */
static volatile	unsigned char bank3	TRISF	@ 0x187;
static volatile	unsigned char bank3	TRISG	@ 0x188;

#ifdef _16C924
static volatile unsigned char 		ADRES	@ 0x1E;
static volatile unsigned char 		ADCON0	@ 0x1F;
static volatile unsigned char bank1	ADCON1	@ 0x9F;
	
/*	ADCON0 bits	*/
static volatile bit	ADCS1	@ (unsigned)&ADCON0*8+7;
static volatile bit	ADCS0	@ (unsigned)&ADCON0*8+6;
static volatile bit	CHS2	@ (unsigned)&ADCON0*8+5;
static volatile bit	CHS1	@ (unsigned)&ADCON0*8+4;
static volatile bit	CHS0	@ (unsigned)&ADCON0*8+3;
static volatile bit	ADGO	@ (unsigned)&ADCON0*8+2;
// Alternate definition for compatability with other devices
static volatile bit	GODONE	@ (unsigned)&ADCON0*8+2;
static volatile bit	ADON	@ (unsigned)&ADCON0*8+0;

/*	ADCON1 bits	*/
static volatile bank1 bit	PCFG2	@ (unsigned)&ADCON1*8+2;
static volatile bank1 bit	PCFG1	@ (unsigned)&ADCON1*8+1;
static volatile bank1 bit	PCFG0	@ (unsigned)&ADCON1*8+0;
#endif

#if defined(_16C925) || defined(_16C926)
static 		unsigned char		ADRESH	@ 0x1E;
static volatile	unsigned char		ADCON0	@ 0x1F;
static 		unsigned char bank1	ADRESL	@ 0x9E;
static volatile	unsigned char bank1	ADCON1	@ 0x9F;
static volatile	unsigned char bank2	PMCON1	@ 0x10C;
static 		unsigned char bank3	PMDATA	@ 0x18C;
static 		unsigned char bank3	PMDATH	@ 0x18D;
static 		unsigned char bank3	PMADR	@ 0x18E;
static		unsigned char bank3 	PMADRH	@ 0x18F;

/* 	ADRESH bits	*/
static 		bit		ADRESH7	@ (unsigned)&ADRESH*8+7;
static 		bit		ADRESH6	@ (unsigned)&ADRESH*8+6;
static 		bit		ADRESH5	@ (unsigned)&ADRESH*8+5;
static 		bit		ADRESH4	@ (unsigned)&ADRESH*8+4;
static 		bit		ADRESH3	@ (unsigned)&ADRESH*8+4;
static 		bit		ADRESH2	@ (unsigned)&ADRESH*8+2;
static 		bit		ADRESH1	@ (unsigned)&ADRESH*8+1;
static 		bit		ADRESH0	@ (unsigned)&ADRESH*8+0;

/* 	ADCON0 bits	*/
static volatile	bit		ADCS1	@ (unsigned)&ADCON0*8+7;
static volatile	bit		ADCS0	@ (unsigned)&ADCON0*8+6;
static volatile	bit		CHS2	@ (unsigned)&ADCON0*8+5;
static volatile	bit		CHS1	@ (unsigned)&ADCON0*8+4;
static volatile	bit		CHS0	@ (unsigned)&ADCON0*8+3;
static volatile	bit		GODONE	@ (unsigned)&ADCON0*8+2;
// Alternate definition for compatability with other devices
static volatile	bit		ADGO	@ (unsigned)&ADCON0*8+2;
static volatile	bit		ADON	@ (unsigned)&ADCON0*8+0;

/* 	ADRESL bits	*/
static 		bit		ADRESL7	@ (unsigned)&ADRESL*8+7;
static 		bit		ADRESL6	@ (unsigned)&ADRESL*8+6;
static 		bit		ADRESL5	@ (unsigned)&ADRESL*8+5;
static 		bit		ADRESL4	@ (unsigned)&ADRESL*8+4;
static 		bit		ADRESL3	@ (unsigned)&ADRESL*8+4;
static 		bit		ADRESL2	@ (unsigned)&ADRESL*8+2;
static 		bit		ADRESL1	@ (unsigned)&ADRESL*8+1;
static 		bit		ADRESL0	@ (unsigned)&ADRESL*8+0;

/*	ADCON1 bits	*/
static volatile	bank1 bit	ADFM	@ (unsigned)&ADCON1*8+7;
static volatile	bank1 bit	PCFG3	@ (unsigned)&ADCON0*8+3;
static volatile	bank1 bit	PCFG2	@ (unsigned)&ADCON0*8+2;
static volatile	bank1 bit	PCFG1	@ (unsigned)&ADCON0*8+1;
static volatile	bank1 bit	PCFG0	@ (unsigned)&ADCON0*8+0;

/* 	PMCON1 bits	*/
static volatile	bank2 bit	RD	@ (unsigned)&PMCON1*8+0;

/*	PMDATA bits	*/
static 		bank3 bit	PMDATA7	@ (unsigned)&PMDATA*8+7;
static 		bank3 bit	PMDATA6	@ (unsigned)&PMDATA*8+6;
static 		bank3 bit	PMDATA5	@ (unsigned)&PMDATA*8+5;
static 		bank3 bit	PMDATA4	@ (unsigned)&PMDATA*8+4;
static 		bank3 bit	PMDATA3	@ (unsigned)&PMDATA*8+3;
static 		bank3 bit	PMDATA2	@ (unsigned)&PMDATA*8+2;
static 		bank3 bit	PMDATA1	@ (unsigned)&PMDATA*8+1;
static 		bank3 bit	PMDATA0	@ (unsigned)&PMDATA*8+0;

/*	PMADR bits	*/
static 		bank3 bit	PMADR7	@ (unsigned)&PMADR*8+7;
static 		bank3 bit	PMADR6	@ (unsigned)&PMADR*8+6;
static 		bank3 bit	PMADR5	@ (unsigned)&PMADR*8+5;
static 		bank3 bit	PMADR4	@ (unsigned)&PMADR*8+4;
static 		bank3 bit	PMADR3	@ (unsigned)&PMADR*8+3;
static 		bank3 bit	PMADR2	@ (unsigned)&PMADR*8+2;
static 		bank3 bit	PMADR1	@ (unsigned)&PMADR*8+1;
static 		bank3 bit	PMADR0	@ (unsigned)&PMADR*8+0;

/*	PMATH bits	*/
static		bank3 bit	PMDATH5	@ (unsigned)&PMDATH*8+5;
static		bank3 bit	PMDATH4	@ (unsigned)&PMDATH*8+4;
static		bank3 bit	PMDATH3	@ (unsigned)&PMDATH*8+3;
static		bank3 bit	PMDATH2	@ (unsigned)&PMDATH*8+2;
static		bank3 bit	PMDATH1	@ (unsigned)&PMDATH*8+1;
static		bank3 bit	PMDATH0	@ (unsigned)&PMDATH*8+0;

/*	PMADRH bits	*/
static		bank3 bit	PMADRH4	@ (unsigned)&PMADRH*8+4;
static		bank3 bit	PMADRH3	@ (unsigned)&PMADRH*8+3;
static		bank3 bit	PMADRH2	@ (unsigned)&PMADRH*8+2;
static		bank3 bit	PMADRH1	@ (unsigned)&PMADRH*8+1;
static		bank3 bit	PMADRH0	@ (unsigned)&PMADRH*8+0;
#endif
	
/*	STATUS bits	*/
static volatile bit	IRP	@ (unsigned)&STATUS*8+7;
static volatile bit	RP1	@ (unsigned)&STATUS*8+6;
static volatile bit	RP0	@ (unsigned)&STATUS*8+5;
static volatile bit	TO	@ (unsigned)&STATUS*8+4;
static volatile bit	PD	@ (unsigned)&STATUS*8+3;
static volatile bit	ZERO	@ (unsigned)&STATUS*8+2;
static volatile bit	DC	@ (unsigned)&STATUS*8+1;
static volatile bit	CARRY	@ (unsigned)&STATUS*8+0;

/*      PORTA bits      */
static volatile bit	RA5	@ (unsigned)&PORTA*8+5;
static volatile bit	RA4	@ (unsigned)&PORTA*8+4;
static volatile bit	RA3	@ (unsigned)&PORTA*8+3;
static volatile bit	RA2	@ (unsigned)&PORTA*8+2;
static volatile bit	RA1	@ (unsigned)&PORTA*8+1;
static volatile bit	RA0	@ (unsigned)&PORTA*8+0;

/*      PORTB bits      */
static volatile bit	RB7	@ (unsigned)&PORTB*8+7;
static volatile bit	RB6	@ (unsigned)&PORTB*8+6;
static volatile bit	RB5	@ (unsigned)&PORTB*8+5;
static volatile bit	RB4	@ (unsigned)&PORTB*8+4;
static volatile bit	RB3	@ (unsigned)&PORTB*8+3;
static volatile bit	RB2	@ (unsigned)&PORTB*8+2;
static volatile bit	RB1	@ (unsigned)&PORTB*8+1;
static volatile bit	RB0	@ (unsigned)&PORTB*8+0;

/*      PORTC bits      */
static volatile bit	RC5	@ (unsigned)&PORTC*8+5;
static volatile bit	RC4	@ (unsigned)&PORTC*8+4;
static volatile bit	RC3	@ (unsigned)&PORTC*8+3;
static volatile bit	RC2	@ (unsigned)&PORTC*8+2;
static volatile bit	RC1	@ (unsigned)&PORTC*8+1;
static volatile bit	RC0	@ (unsigned)&PORTC*8+0;

/*      PORTD bits      */
static volatile bit	RD7	@ (unsigned)&PORTD*8+7;
static volatile bit	RD6	@ (unsigned)&PORTD*8+6;
static volatile bit	RD5	@ (unsigned)&PORTD*8+5;
static volatile bit	RD4	@ (unsigned)&PORTD*8+4;
static volatile bit	RD3	@ (unsigned)&PORTD*8+3;
static volatile bit	RD2	@ (unsigned)&PORTD*8+2;
static volatile bit	RD1	@ (unsigned)&PORTD*8+1;
static volatile bit	RD0	@ (unsigned)&PORTD*8+0;

/*      PORTE bits      */
static volatile bit	RE7	@ (unsigned)&PORTE*8+7;
static volatile bit	RE6	@ (unsigned)&PORTE*8+6;
static volatile bit	RE5	@ (unsigned)&PORTE*8+5;
static volatile bit	RE4	@ (unsigned)&PORTE*8+4;
static volatile bit	RE3	@ (unsigned)&PORTE*8+3;
static volatile bit	RE2	@ (unsigned)&PORTE*8+2;
static volatile bit	RE1	@ (unsigned)&PORTE*8+1;
static volatile bit	RE0	@ (unsigned)&PORTE*8+0;

/*	INTCON bits	*/
static volatile bit	GIE	@ (unsigned)&INTCON*8+7;
static volatile bit	PEIE	@ (unsigned)&INTCON*8+6;
static volatile bit	T0IE	@ (unsigned)&INTCON*8+5;
static volatile bit	INTE	@ (unsigned)&INTCON*8+4;
static volatile bit	RBIE	@ (unsigned)&INTCON*8+3;
static volatile bit	T0IF	@ (unsigned)&INTCON*8+2;
static volatile bit	INTF	@ (unsigned)&INTCON*8+1;
static volatile bit	RBIF	@ (unsigned)&INTCON*8+0;

/*	PIR1 bits	*/
static volatile bit	LCDIF	@ (unsigned)&PIR1*8+7;
#ifndef _16C923
static volatile bit	ADIF	@ (unsigned)&PIR1*8+6;
#endif
static volatile bit	SSPIF	@ (unsigned)&PIR1*8+3;
static volatile bit	CCP1IF	@ (unsigned)&PIR1*8+2;
static volatile bit	TMR2IF	@ (unsigned)&PIR1*8+1;
static volatile bit	TMR1IF	@ (unsigned)&PIR1*8+0;

/*	T1CON bits	*/
static volatile bit	T1CKPS1	@ (unsigned)&T1CON*8+5;
static volatile bit	T1CKPS0	@ (unsigned)&T1CON*8+4;
static volatile bit	T1OSCEN	@ (unsigned)&T1CON*8+3;
static volatile bit	T1SYNC	@ (unsigned)&T1CON*8+2;
static volatile bit	TMR1CS	@ (unsigned)&T1CON*8+1;
static volatile bit	TMR1ON	@ (unsigned)&T1CON*8+0;

/*	T2CON bits	*/
static volatile bit	TOUTPS3	@ (unsigned)&T2CON*8+6;
static volatile bit	TOUTPS2	@ (unsigned)&T2CON*8+5;
static volatile bit	TOUTPS1	@ (unsigned)&T2CON*8+4;
static volatile bit	TOUTPS0	@ (unsigned)&T2CON*8+3;
static volatile bit	TMR2ON	@ (unsigned)&T2CON*8+2;
static volatile bit	T2CKPS1	@ (unsigned)&T2CON*8+1;
static volatile bit	T2CKPS0	@ (unsigned)&T2CON*8+0;

/*	SSPCON bits	*/
static volatile bit	WCOL	@ (unsigned)&SSPCON*8+7;
static volatile bit	SSPOV	@ (unsigned)&SSPCON*8+6;
static volatile bit	SSPEN	@ (unsigned)&SSPCON*8+5;
static volatile bit	CKP	@ (unsigned)&SSPCON*8+4;
static volatile bit	SSPM3	@ (unsigned)&SSPCON*8+3;
static volatile bit	SSPM2	@ (unsigned)&SSPCON*8+2;
static volatile bit	SSPM1	@ (unsigned)&SSPCON*8+1;
static volatile bit	SSPM0	@ (unsigned)&SSPCON*8+0;

/*	CCP1CON bits	*/
static volatile bit	CCP1X	@ (unsigned)&CCP1CON*8+5;
static volatile bit	CCPIY	@ (unsigned)&CCP1CON*8+4;
static volatile bit	CCP1M3	@ (unsigned)&CCP1CON*8+3;
static volatile bit	CCP1M2	@ (unsigned)&CCP1CON*8+2;
static volatile bit	CCP1M1	@ (unsigned)&CCP1CON*8+1;
static volatile bit	CCP1M0	@ (unsigned)&CCP1CON*8+0;

/*	OPTION bits	*/
static bank1 bit	RBPU	@ (unsigned)&OPTION*8+7;
static bank1 bit	INTEDG	@ (unsigned)&OPTION*8+6;
static bank1 bit	T0CS	@ (unsigned)&OPTION*8+5;
static bank1 bit	T0SE	@ (unsigned)&OPTION*8+4;
static bank1 bit	PSA	@ (unsigned)&OPTION*8+3;
static bank1 bit	PS2	@ (unsigned)&OPTION*8+2;
static bank1 bit	PS1	@ (unsigned)&OPTION*8+1;
static bank1 bit	PS0	@ (unsigned)&OPTION*8+0;

/*      TRISA bits      */
static volatile bank1 bit	TRISA5	@ (unsigned)&TRISA*8+5;
static volatile bank1 bit	TRISA4	@ (unsigned)&TRISA*8+4;
static volatile bank1 bit	TRISA3	@ (unsigned)&TRISA*8+3;
static volatile bank1 bit	TRISA2	@ (unsigned)&TRISA*8+2;
static volatile bank1 bit	TRISA1	@ (unsigned)&TRISA*8+1;
static volatile bank1 bit	TRISA0	@ (unsigned)&TRISA*8+0;

/*      TRISB bits      */
static volatile bank1 bit	TRISB7	@ (unsigned)&TRISB*8+7;
static volatile bank1 bit	TRISB6	@ (unsigned)&TRISB*8+6;
static volatile bank1 bit	TRISB5	@ (unsigned)&TRISB*8+5;
static volatile bank1 bit	TRISB4	@ (unsigned)&TRISB*8+4;
static volatile bank1 bit	TRISB3	@ (unsigned)&TRISB*8+3;
static volatile bank1 bit	TRISB2	@ (unsigned)&TRISB*8+2;
static volatile bank1 bit	TRISB1	@ (unsigned)&TRISB*8+1;
static volatile bank1 bit	TRISB0	@ (unsigned)&TRISB*8+0;

/*      TRISC bits      */
static volatile bank1 bit	TRISC5	@ (unsigned)&TRISC*8+5;
static volatile bank1 bit	TRISC4	@ (unsigned)&TRISC*8+4;
static volatile bank1 bit	TRISC3	@ (unsigned)&TRISC*8+3;
static volatile bank1 bit	TRISC2	@ (unsigned)&TRISC*8+2;
static volatile bank1 bit	TRISC1	@ (unsigned)&TRISC*8+1;
static volatile bank1 bit	TRISC0	@ (unsigned)&TRISC*8+0;

/*      TRISD bits      */
static volatile bank1 bit	TRISD7	@ (unsigned)&TRISD*8+7;
static volatile bank1 bit	TRISD6	@ (unsigned)&TRISD*8+6;
static volatile bank1 bit	TRISD5	@ (unsigned)&TRISD*8+5;
static volatile bank1 bit	TRISD4	@ (unsigned)&TRISD*8+4;
static volatile bank1 bit	TRISD3	@ (unsigned)&TRISD*8+3;
static volatile bank1 bit	TRISD2	@ (unsigned)&TRISD*8+2;
static volatile bank1 bit	TRISD1	@ (unsigned)&TRISD*8+1;
static volatile bank1 bit	TRISD0	@ (unsigned)&TRISD*8+0;

/*      TRISE bits      */
static volatile bank1 bit	TRISE7	@ (unsigned)&TRISE*8+7;
static volatile bank1 bit	TRISE6	@ (unsigned)&TRISE*8+6;
static volatile bank1 bit	TRISE5	@ (unsigned)&TRISE*8+5;
static volatile bank1 bit	TRISE4	@ (unsigned)&TRISE*8+4;
static volatile bank1 bit	TRISE3	@ (unsigned)&TRISE*8+3;
static volatile bank1 bit	TRISE2	@ (unsigned)&TRISE*8+2;
static volatile bank1 bit	TRISE1	@ (unsigned)&TRISE*8+1;
static volatile bank1 bit	TRISE0	@ (unsigned)&TRISE*8+0;

/*	PIE1 bits	*/
static volatile bank1 bit	LCDIE	@ (unsigned)&PIE1*8+7;
#ifndef _16C923
static volatile bank1 bit	ADIE	@ (unsigned)&PIE1*8+6;
#endif
static volatile bank1 bit	SSPIE	@ (unsigned)&PIE1*8+3;
static volatile bank1 bit	CCP1IE	@ (unsigned)&PIE1*8+2;
static volatile bank1 bit	TMR2IE	@ (unsigned)&PIE1*8+1;
static volatile bank1 bit	TMR1IE	@ (unsigned)&PIE1*8+0;

/*	PCON bit	*/
static volatile bank1 bit	POR	@ (unsigned)&PCON*8+1;

/*      SSPSTAT bits    */
static volatile bank1 bit	SMP		@ (unsigned)&SSPSTAT*8+7;
static volatile bank1 bit	CKE		@ (unsigned)&SSPSTAT*8+6;
static volatile bank1 bit	DA		@ (unsigned)&SSPSTAT*8+5;
static volatile bank1 bit	STOP		@ (unsigned)&SSPSTAT*8+4;
static volatile bank1 bit	START		@ (unsigned)&SSPSTAT*8+3;
static volatile bank1 bit	RW		@ (unsigned)&SSPSTAT*8+2;
static volatile bank1 bit	UA		@ (unsigned)&SSPSTAT*8+1;
static volatile bank1 bit	BF		@ (unsigned)&SSPSTAT*8+0;
#ifdef __STAT_BACKWARD_COMPATIBILITY
#define STAT_SMP	SMP
#define STAT_CKE	CKE
#define STAT_DA	DA
#define STAT_P	STOP
#define STAT_S	START
#define STAT_RW	RW
#define STAT_UA	UA
#define STAT_BF	BF
#endif

/*      PORTF bits      */
static volatile bank2 bit	RF7	@ (unsigned)&PORTF*8+7;
static volatile bank2 bit	RF6	@ (unsigned)&PORTF*8+6;
static volatile bank2 bit	RF5	@ (unsigned)&PORTF*8+5;
static volatile bank2 bit	RF4	@ (unsigned)&PORTF*8+4;
static volatile bank2 bit	RF3	@ (unsigned)&PORTF*8+3;
static volatile bank2 bit	RF2	@ (unsigned)&PORTF*8+2;
static volatile bank2 bit	RF1	@ (unsigned)&PORTF*8+1;
static volatile bank2 bit	RF0	@ (unsigned)&PORTF*8+0;

/*      PORTG bits      */
static volatile bank2 bit	RG7	@ (unsigned)&PORTG*8+7;
static volatile bank2 bit	RG6	@ (unsigned)&PORTG*8+6;
static volatile bank2 bit	RG5	@ (unsigned)&PORTG*8+5;
static volatile bank2 bit	RG4	@ (unsigned)&PORTG*8+4;
static volatile bank2 bit	RG3	@ (unsigned)&PORTG*8+3;
static volatile bank2 bit	RG2	@ (unsigned)&PORTG*8+2;
static volatile bank2 bit	RG1	@ (unsigned)&PORTG*8+1;
static volatile bank2 bit	RG0	@ (unsigned)&PORTG*8+0;

/*      LCDSE bits      */
static volatile bank2 bit	SE29	@ (unsigned)&LCDSE*8+7;
static volatile bank2 bit	SE27	@ (unsigned)&LCDSE*8+6;
static volatile bank2 bit	SE20	@ (unsigned)&LCDSE*8+5;
static volatile bank2 bit	SE16	@ (unsigned)&LCDSE*8+4;
static volatile bank2 bit	SE12	@ (unsigned)&LCDSE*8+3;
static volatile bank2 bit	SE9	@ (unsigned)&LCDSE*8+2;
static volatile bank2 bit	SE5	@ (unsigned)&LCDSE*8+1;
static volatile bank2 bit	SE0	@ (unsigned)&LCDSE*8+0;

/*      LCDPS bits      */
static volatile bank2 bit	LP3	@ (unsigned)&LCDPS*8+3;
static volatile bank2 bit	LP2	@ (unsigned)&LCDPS*8+2;
static volatile bank2 bit	LP1	@ (unsigned)&LCDPS*8+1;
static volatile bank2 bit	LP0	@ (unsigned)&LCDPS*8+0;

/*      LCDCON bits     */
static volatile bank2 bit	LCDEN	@ (unsigned)&LCDCON*8+7;
static volatile bank2 bit	SLPEN	@ (unsigned)&LCDCON*8+6;
static volatile bank2 bit	VGEN	@ (unsigned)&LCDCON*8+4;
static volatile bank2 bit	CS1	@ (unsigned)&LCDCON*8+3;
static volatile bank2 bit	CS0	@ (unsigned)&LCDCON*8+2;
static volatile bank2 bit	LMUX1	@ (unsigned)&LCDCON*8+1;
static volatile bank2 bit	LMUX0	@ (unsigned)&LCDCON*8+0;

/*      LCDD00 bits     COM0    */
static volatile bank2 bit	COM0SEG07	@ (unsigned)&LCDD00*8+7;
static volatile bank2 bit	COM0SEG06	@ (unsigned)&LCDD00*8+6;
static volatile bank2 bit	COM0SEG05	@ (unsigned)&LCDD00*8+5;
static volatile bank2 bit	COM0SEG04	@ (unsigned)&LCDD00*8+4;
static volatile bank2 bit	COM0SEG03	@ (unsigned)&LCDD00*8+3;
static volatile bank2 bit	COM0SEG02	@ (unsigned)&LCDD00*8+2;
static volatile bank2 bit	COM0SEG01	@ (unsigned)&LCDD00*8+1;
static volatile bank2 bit	COM0SEG00	@ (unsigned)&LCDD00*8+0;

/*      LCDD01 bits     COM0    */
static volatile bank2 bit	COM0SEG15	@ (unsigned)&LCDD01*8+7;
static volatile bank2 bit	COM0SEG14	@ (unsigned)&LCDD01*8+6;
static volatile bank2 bit	COM0SEG13	@ (unsigned)&LCDD01*8+5;
static volatile bank2 bit	COM0SEG12	@ (unsigned)&LCDD01*8+4;
static volatile bank2 bit	COM0SEG11	@ (unsigned)&LCDD01*8+3;
static volatile bank2 bit	COM0SEG10	@ (unsigned)&LCDD01*8+2;
static volatile bank2 bit	COM0SEG09	@ (unsigned)&LCDD01*8+1;
static volatile bank2 bit	COM0SEG08	@ (unsigned)&LCDD01*8+0;

/*      LCDD02 bits     COM0    */
static volatile bank2 bit	COM0SEG23	@ (unsigned)&LCDD02*8+7;
static volatile bank2 bit	COM0SEG22	@ (unsigned)&LCDD02*8+6;
static volatile bank2 bit	COM0SEG21	@ (unsigned)&LCDD02*8+5;
static volatile bank2 bit	COM0SEG20	@ (unsigned)&LCDD02*8+4;
static volatile bank2 bit	COM0SEG19	@ (unsigned)&LCDD02*8+3;
static volatile bank2 bit	COM0SEG18	@ (unsigned)&LCDD02*8+2;
static volatile bank2 bit	COM0SEG17	@ (unsigned)&LCDD02*8+1;
static volatile bank2 bit	COM0SEG16	@ (unsigned)&LCDD02*8+0;

/*      LCDD03 bits     COM0    */
static volatile bank2 bit	COM0SEG31	@ (unsigned)&LCDD03*8+7;
static volatile bank2 bit	COM0SEG30	@ (unsigned)&LCDD03*8+6;
static volatile bank2 bit	COM0SEG29	@ (unsigned)&LCDD03*8+5;
static volatile bank2 bit	COM0SEG28	@ (unsigned)&LCDD03*8+4;
static volatile bank2 bit	COM0SEG27	@ (unsigned)&LCDD03*8+3;
static volatile bank2 bit	COM0SEG26	@ (unsigned)&LCDD03*8+2;
static volatile bank2 bit	COM0SEG25	@ (unsigned)&LCDD03*8+1;
static volatile bank2 bit	COM0SEG24	@ (unsigned)&LCDD03*8+0;

/*      LCDD04 bits     COM1    */
static volatile bank2 bit	COM1SEG07	@ (unsigned)&LCDD04*8+7;
static volatile bank2 bit	COM1SEG06	@ (unsigned)&LCDD04*8+6;
static volatile bank2 bit	COM1SEG05	@ (unsigned)&LCDD04*8+5;
static volatile bank2 bit	COM1SEG04	@ (unsigned)&LCDD04*8+4;
static volatile bank2 bit	COM1SEG03	@ (unsigned)&LCDD04*8+3;
static volatile bank2 bit	COM1SEG02	@ (unsigned)&LCDD04*8+2;
static volatile bank2 bit	COM1SEG01	@ (unsigned)&LCDD04*8+1;
static volatile bank2 bit	COM1SEG00	@ (unsigned)&LCDD04*8+0;

/*      LCDD05 bits     COM1    */
static volatile bank2 bit	COM1SEG15	@ (unsigned)&LCDD05*8+7;
static volatile bank2 bit	COM1SEG14	@ (unsigned)&LCDD05*8+6;
static volatile bank2 bit	COM1SEG13	@ (unsigned)&LCDD05*8+5;
static volatile bank2 bit	COM1SEG12	@ (unsigned)&LCDD05*8+4;
static volatile bank2 bit	COM1SEG11	@ (unsigned)&LCDD05*8+3;
static volatile bank2 bit	COM1SEG10	@ (unsigned)&LCDD05*8+2;
static volatile bank2 bit	COM1SEG09	@ (unsigned)&LCDD05*8+1;
static volatile bank2 bit	COM1SEG08	@ (unsigned)&LCDD05*8+0;

/*      LCDD06 bits     COM1    */
static volatile bank2 bit	COM1SEG23	@ (unsigned)&LCDD06*8+7;
static volatile bank2 bit	COM1SEG22	@ (unsigned)&LCDD06*8+6;
static volatile bank2 bit	COM1SEG21	@ (unsigned)&LCDD06*8+5;
static volatile bank2 bit	COM1SEG20	@ (unsigned)&LCDD06*8+4;
static volatile bank2 bit	COM1SEG19	@ (unsigned)&LCDD06*8+3;
static volatile bank2 bit	COM1SEG18	@ (unsigned)&LCDD06*8+2;
static volatile bank2 bit	COM1SEG17	@ (unsigned)&LCDD06*8+1;
static volatile bank2 bit	COM1SEG16	@ (unsigned)&LCDD06*8+0;

/*      LCDD07 bits     COM1    */
static volatile bank2 bit	COM1SEG31	@ (unsigned)&LCDD07*8+7;
static volatile bank2 bit	COM1SEG30	@ (unsigned)&LCDD07*8+6;
static volatile bank2 bit	COM1SEG29	@ (unsigned)&LCDD07*8+5;
static volatile bank2 bit	COM1SEG28	@ (unsigned)&LCDD07*8+4;
static volatile bank2 bit	COM1SEG27	@ (unsigned)&LCDD07*8+3;
static volatile bank2 bit	COM1SEG26	@ (unsigned)&LCDD07*8+2;
static volatile bank2 bit	COM1SEG25	@ (unsigned)&LCDD07*8+1;
static volatile bank2 bit	COM1SEG24	@ (unsigned)&LCDD07*8+0;

/*      LCDD08 bits     COM2    */
static volatile bank2 bit	COM2SEG07	@ (unsigned)&LCDD08*8+7;
static volatile bank2 bit	COM2SEG06	@ (unsigned)&LCDD08*8+6;
static volatile bank2 bit	COM2SEG05	@ (unsigned)&LCDD08*8+5;
static volatile bank2 bit	COM2SEG04	@ (unsigned)&LCDD08*8+4;
static volatile bank2 bit	COM2SEG03	@ (unsigned)&LCDD08*8+3;
static volatile bank2 bit	COM2SEG02	@ (unsigned)&LCDD08*8+2;
static volatile bank2 bit	COM2SEG01	@ (unsigned)&LCDD08*8+1;
static volatile bank2 bit	COM2SEG00	@ (unsigned)&LCDD08*8+0;

/*      LCDD09 bits     COM2    */
static volatile bank2 bit	COM2SEG15	@ (unsigned)&LCDD09*8+7;
static volatile bank2 bit	COM2SEG14	@ (unsigned)&LCDD09*8+6;
static volatile bank2 bit	COM2SEG13	@ (unsigned)&LCDD09*8+5;
static volatile bank2 bit	COM2SEG12	@ (unsigned)&LCDD09*8+4;
static volatile bank2 bit	COM2SEG11	@ (unsigned)&LCDD09*8+3;
static volatile bank2 bit	COM2SEG10	@ (unsigned)&LCDD09*8+2;
static volatile bank2 bit	COM2SEG09	@ (unsigned)&LCDD09*8+1;
static volatile bank2 bit	COM2SEG08	@ (unsigned)&LCDD09*8+0;

/*      LCDD10 bits     COM2    */
static volatile bank2 bit	COM2SEG23	@ (unsigned)&LCDD10*8+7;
static volatile bank2 bit	COM2SEG22	@ (unsigned)&LCDD10*8+6;
static volatile bank2 bit	COM2SEG21	@ (unsigned)&LCDD10*8+5;
static volatile bank2 bit	COM2SEG20	@ (unsigned)&LCDD10*8+4;
static volatile bank2 bit	COM2SEG19	@ (unsigned)&LCDD10*8+3;
static volatile bank2 bit	COM2SEG18	@ (unsigned)&LCDD10*8+2;
static volatile bank2 bit	COM2SEG17	@ (unsigned)&LCDD10*8+1;
static volatile bank2 bit	COM2SEG16	@ (unsigned)&LCDD10*8+0;

/*      LCDD11 bits     COM2    */
static volatile bank2 bit	COM2SEG31	@ (unsigned)&LCDD11*8+7;
static volatile bank2 bit	COM2SEG30	@ (unsigned)&LCDD11*8+6;
static volatile bank2 bit	COM2SEG29	@ (unsigned)&LCDD11*8+5;
static volatile bank2 bit	COM2SEG28	@ (unsigned)&LCDD11*8+4;
static volatile bank2 bit	COM2SEG27	@ (unsigned)&LCDD11*8+3;
static volatile bank2 bit	COM2SEG26	@ (unsigned)&LCDD11*8+2;
static volatile bank2 bit	COM2SEG25	@ (unsigned)&LCDD11*8+1;
static volatile bank2 bit	COM2SEG24	@ (unsigned)&LCDD11*8+0;

/*      LCDD12 bits     COM3    */
static volatile bank2 bit	COM3SEG07	@ (unsigned)&LCDD12*8+7;
static volatile bank2 bit	COM3SEG06	@ (unsigned)&LCDD12*8+6;
static volatile bank2 bit	COM3SEG05	@ (unsigned)&LCDD12*8+5;
static volatile bank2 bit	COM3SEG04	@ (unsigned)&LCDD12*8+4;
static volatile bank2 bit	COM3SEG03	@ (unsigned)&LCDD12*8+3;
static volatile bank2 bit	COM3SEG02	@ (unsigned)&LCDD12*8+2;
static volatile bank2 bit	COM3SEG01	@ (unsigned)&LCDD12*8+1;
static volatile bank2 bit	COM3SEG00	@ (unsigned)&LCDD12*8+0;

/*      LCDD13 bits     COM3    */
static volatile bank2 bit	COM3SEG15	@ (unsigned)&LCDD13*8+7;
static volatile bank2 bit	COM3SEG14	@ (unsigned)&LCDD13*8+6;
static volatile bank2 bit	COM3SEG13	@ (unsigned)&LCDD13*8+5;
static volatile bank2 bit	COM3SEG12	@ (unsigned)&LCDD13*8+4;
static volatile bank2 bit	COM3SEG11	@ (unsigned)&LCDD13*8+3;
static volatile bank2 bit	COM3SEG10	@ (unsigned)&LCDD13*8+2;
static volatile bank2 bit	COM3SEG09	@ (unsigned)&LCDD13*8+1;
static volatile bank2 bit	COM3SEG08	@ (unsigned)&LCDD13*8+0;

/*      LCDD14 bits     COM3    */
static volatile bank2 bit	COM3SEG23	@ (unsigned)&LCDD14*8+7;
static volatile bank2 bit	COM3SEG22	@ (unsigned)&LCDD14*8+6;
static volatile bank2 bit	COM3SEG21	@ (unsigned)&LCDD14*8+5;
static volatile bank2 bit	COM3SEG20	@ (unsigned)&LCDD14*8+4;
static volatile bank2 bit	COM3SEG19	@ (unsigned)&LCDD14*8+3;
static volatile bank2 bit	COM3SEG18	@ (unsigned)&LCDD14*8+2;
static volatile bank2 bit	COM3SEG17	@ (unsigned)&LCDD14*8+1;
static volatile bank2 bit	COM3SEG16	@ (unsigned)&LCDD14*8+0;

/*      LCDD15 bits     COM3    */
static volatile bank2 bit	COM3SEG31	@ (unsigned)&LCDD15*8+7;
static volatile bank2 bit	COM3SEG30	@ (unsigned)&LCDD15*8+6;
static volatile bank2 bit	COM3SEG29	@ (unsigned)&LCDD15*8+5;
static volatile bank2 bit	COM3SEG28	@ (unsigned)&LCDD15*8+4;
static volatile bank2 bit	COM3SEG27	@ (unsigned)&LCDD15*8+3;
static volatile bank2 bit	COM3SEG26	@ (unsigned)&LCDD15*8+2;
static volatile bank2 bit	COM3SEG25	@ (unsigned)&LCDD15*8+1;
static volatile bank2 bit	COM3SEG24	@ (unsigned)&LCDD15*8+0;

/*      TRISF bits      */
static volatile bank3 bit	TRISF7	@ (unsigned)&TRISF*8+7;
static volatile bank3 bit	TRISF6	@ (unsigned)&TRISF*8+6;
static volatile bank3 bit	TRISF5	@ (unsigned)&TRISF*8+5;
static volatile bank3 bit	TRISF4	@ (unsigned)&TRISF*8+4;
static volatile bank3 bit	TRISF3	@ (unsigned)&TRISF*8+3;
static volatile bank3 bit	TRISF2	@ (unsigned)&TRISF*8+2;
static volatile bank3 bit	TRISF1	@ (unsigned)&TRISF*8+1;
static volatile bank3 bit	TRISF0	@ (unsigned)&TRISF*8+0;

/*      TRISG bits      */
static volatile bank3 bit	TRISG7	@ (unsigned)&TRISG*8+7;
static volatile bank3 bit	TRISG6	@ (unsigned)&TRISG*8+6;
static volatile bank3 bit	TRISG5	@ (unsigned)&TRISG*8+5;
static volatile bank3 bit	TRISG4	@ (unsigned)&TRISG*8+4;
static volatile bank3 bit	TRISG3	@ (unsigned)&TRISG*8+3;
static volatile bank3 bit	TRISG2	@ (unsigned)&TRISG*8+2;
static volatile bank3 bit	TRISG1	@ (unsigned)&TRISG*8+1;
static volatile bank3 bit	TRISG0	@ (unsigned)&TRISG*8+0;

// definitions select memory reading macros in pic.h
#define EECON1	PMCON1
#define EEDATA	PMDATA
#define EEDATH	PMDATH
#define EEADR	PMADR
#define EEADRH	PMADRH

#define CONFIG_ADDR	0x2007

#define FOSC0		0x01
#define FOSC1		0x02
/*osc configurations*/
#define RC		0x3FFF	// resistor/capacitor
#define HS		0x3FFE	// high speed crystal/resonator
#define XT		0x3FFD	// crystal/resonator
#define LP		0x3FFC	// low power crystal/resonator

#define WDTE		0x04
/*watchdog*/
#define WDTEN		0x3FFF	// enable watchdog timer
#define WDTDIS		0x3FFB	// disable watchdog timer

#define PWRTE		0x08
/*power up timer*/
#define PWRTEN		0x3FF7	// power up timer enable
#define PWRTDIS		0x3FFF	// power up timer disable

#ifdef _16C924
#define BODEN		0x40
/*brown out reset*/
#define BOREN		0x3FFF	// brown out reset enable
#define BORDIS		0x3FBF	// brown out reset disable
#endif

#define CP0		0x1510
#define CP1		0x2A20
/* code protection */
#define UNPROTECT	0x3FFF		/* unprotected */
#define PROTECT50	0x3FEF		/* upper half program memory code protected */
#define PROTECT75	0x3FDF		/* upper 3/4 program memory code protected */
#define PROTECT		0x3FCF		/* all memory code is protected */

