
#ifndef	_HTC_H_
#warning Header file usb97100.h included directly. Use #include <htc.h> instead.
#endif

/* header file for the SMSC microcontroller
	USB97C100
 */

#ifndef	__USB97100_H

#define	__USB97100_H


typedef struct {
	unsigned B7:1;	/* this is the most significant bit */
	unsigned B6:1;
	unsigned B5:1;
	unsigned B4:1;
	unsigned B3:1;
	unsigned B2:1;
	unsigned B1:1;
	unsigned B0:1;
}	SFR_BITS;

// Standard Special Function Registers
static volatile unsigned char	P0	@ 0x80;
static volatile unsigned char	SP	@ 0x81;
static volatile unsigned char	DPL	@ 0x82;
static volatile unsigned char	DPH	@ 0x83;
// 16 bit definition
static 		unsigned char	PCON	@ 0x87;
static volatile	unsigned char	TCON	@ 0x88;
static 		unsigned char	TMOD	@ 0x89;
static volatile unsigned char	TL0	@ 0x8A;
static volatile unsigned char	TL1	@ 0x8B;
static volatile unsigned char	TH0	@ 0x8C;
static volatile unsigned char	TH1	@ 0x8D;
static volatile unsigned char	P1	@ 0x90;
static 		unsigned char	SCON	@ 0x98;
static volatile unsigned char	SBUF	@ 0x99;
static volatile unsigned char	P2	@ 0xA0;
static 		unsigned char	IE	@ 0xA8;
static volatile unsigned char	P3	@ 0xB0;
static 		unsigned char	IP	@ 0xB8;
static volatile unsigned char	PSW	@ 0xD0;
static volatile unsigned char	ACC	@ 0xE0;
static volatile unsigned char	B	@ 0xF0;

static volatile SFR_BITS	P0_BITS		@ 0x80;
static 		SFR_BITS	PCON_BITS	@ 0x87;
static volatile	SFR_BITS	TCON_BITS	@ 0x88;
static 		SFR_BITS	TMOD_BITS	@ 0x89;
static volatile SFR_BITS	P1_BITS		@ 0x90;
static 		SFR_BITS	SCON_BITS	@ 0x98;
static volatile SFR_BITS	P2_BITS		@ 0xA0;
static 		SFR_BITS	IE_BITS		@ 0xA8;
static volatile SFR_BITS	P3_BITS		@ 0xB0;
static 		SFR_BITS	IP_BITS		@ 0xB8;
static volatile SFR_BITS	PSW_BITS	@ 0xD0;
static volatile SFR_BITS	ACC_BITS	@ 0xE0;
static volatile SFR_BITS	B_BITS		@ 0xF0;

// MCU Block registers
static volatile xdata unsigned char	ISR_0		@ 0x7F00;	// INT0 Source Register
static		xdata unsigned char	IMR_0		@ 0x7F01;	// INT0 Mask Register
static volatile xdata unsigned char	ISR_1		@ 0x7F02;	// INT1 Source Register
static		xdata unsigned char	IMR_1		@ 0x7F03;	// INT1 Mask Register
static		xdata unsigned char	DEV_REV		@ 0x7F06;	// Device Revision Register
static		xdata unsigned char	DEV_ID		@ 0x7F07;	// Device ID Register
// UTILITY REGISTERS
static		xdata unsigned char	GPIOA_DIR	@ 0x7F18;	// GPIO Configuration Register
static volatile xdata unsigned char	GPIOA_OUT	@ 0x7F19;	// GPIO Data Output Register
static volatile xdata unsigned char	GPIOA_IN	@ 0x7F1A;	// GPIO Data Input Register
static		xdata unsigned char	UTIL_CONFIG	@ 0x7F1B;	// Miscellaneous Configuration Register
// POWER MANAGEMENT REGISTERS
static		xdata unsigned char	CLOCK_SEL	@ 0x7F27;	// 8051 and 8237 Clock Select Register
static		xdata unsigned char	MEM_BANK	@ 0x7F29;	// Flash Bank Select
static volatile xdata unsigned char	WU_SRC_1	@ 0x7F2A;	// Wakeup Source
static		xdata unsigned char	WU_MSK_1	@ 0x7F2B;	// Wakeup Mask
static volatile xdata unsigned char	WU_SRC_2	@ 0x7F2C;	// Wakeup Source
static		xdata unsigned char	WU_MSK_2	@ 0x7F2D;	// Wakeup Mask
// ISA BUS CONTROL REGISTERS
static volatile xdata unsigned char	GP1DATA		@ 0x7F10;	// GP FIFO Data Port #1
static volatile xdata unsigned char	GP1STATUS	@ 0x7F11;	// GP FIFO status Port #1
static volatile xdata unsigned char	GP2DATA		@ 0x7F12;	// GP FIFO Data Port #2
static volatile xdata unsigned char	GP2STATUS	@ 0x7F13;	// GP FIFO status Port #2
static volatile xdata unsigned char	GP3DATA		@ 0x7F14;	// GP FIFO Data Port #3
static volatile xdata unsigned char	GP3STATUS	@ 0x7F15;	// GP FIFO status Port #3
static volatile xdata unsigned char	GP4DATA		@ 0x7F16;	// GP FIFO Data Port #4
static volatile xdata unsigned char	GP4STATUS	@ 0x7F17;	// GP FIFO status Port #4
static volatile xdata unsigned char	BUS_REQ		@ 0x7F70;	// ISA Bus Request Register
static volatile xdata unsigned char	IOBASE		@ 0x7F71;	// 8051 ISA I/O Window Base Register
static volatile xdata unsigned char	MEMBASE		@ 0x7F72;	// 8051 ISA Memory Window Base Register
static volatile xdata unsigned char	BUS_STAT	@ 0x7F73;	// ISADMA Request Status
static		xdata unsigned char	BUS_MASK	@ 0x7F74;	// ISADMA Request Interrupt Mask
static volatile xdata unsigned char	MCU_TEST2	@ 0x7F7E;	// Reserved for Test
static volatile xdata unsigned char	MCU_TEST1	@ 0x7F7F;	// Reserved for Test
static volatile xdata unsigned char	MMU_DATA	@ 0x6000;	// 8051-MMU Data Window Register FIFO
static volatile xdata unsigned char	PRL		@ 0x7F50;	// 8051-MMU Pointer Register (Low)
static volatile xdata unsigned char	PRH		@ 0x7F51;	// 8051-MMU Pointer Register (High) & R/W
static		xdata unsigned char	MMUTX_SEL	@ 0x7F52;	// 8051-MMU TX FIFO Select for Commands
static		xdata unsigned char	MMUCR		@ 0x7F53;	// 8051-MMU Command Register
static volatile xdata unsigned char	ARR		@ 0x7F54;	// 8051-MMU Allocation Result Register
static volatile xdata unsigned char	PNR		@ 0x7F55;	// 8051-MMU Packet Number Register
static volatile xdata unsigned char	PAGS_FREE	@ 0x7F56;	// Pages Free In the MMU
static volatile xdata unsigned char	TX_MGMT2	@ 0x7F57;	// TX Management Register 2
static volatile xdata unsigned char	RXFIFO		@ 0x7F58;	// RX Packet FIFO Register (All EPs)
static volatile xdata unsigned char	POP_TX		@ 0x7F59;	// POP TX FIFO
static volatile xdata unsigned char	TXSTAT_A	@ 0x7F60;	// TX Packet FIFO Status Register (EP0-3)
static volatile xdata unsigned char	TXSTAT_B	@ 0x7F61;	// TX Packet FIFO Status Register (EP4-7)
static volatile xdata unsigned char	TXSTAT_C	@ 0x7F62;	// TX Packet FIFO Status Register (EP8-11)
static volatile xdata unsigned char	TXSTAT_D	@ 0x7F63;	// TX Packet FIFO Status Register (EP12-15)
static volatile xdata unsigned char	MMU_TEST1	@ 0x7F64;	// Reserved for Test
static volatile xdata unsigned char	MMU_TEST2	@ 0x7F65;	// Reserved for Test
static volatile xdata unsigned char	MMU_TEST3	@ 0x7F66;	// Reserved for Test
static volatile xdata unsigned char	TX_MGMT1	@ 0x7F67;	// TX Management Register 1
static volatile xdata unsigned char	MMU_TEST4	@ 0x7F6E;	// Reserved for Test
static volatile xdata unsigned char	MMU_TEST5	@ 0x7F6F;	// Reserved for Test
// SIE Control Registers
static volatile xdata unsigned char	EP_CTRL0	@ 0x7F80;	// Endpoint 0 Control Register
static volatile xdata unsigned char	EP_CTRL1	@ 0x7F81;	// Endpoint 1 Control Register
static volatile xdata unsigned char	EP_CTRL2	@ 0x7F82;	// Endpoint 2 Control Register
static volatile xdata unsigned char	EP_CTRL3	@ 0x7F83;	// Endpoint 3 Control Register
static volatile xdata unsigned char	EP_CTRL4	@ 0x7F84;	// Endpoint 4 Control Register
static volatile xdata unsigned char	EP_CTRL5	@ 0x7F85;	// Endpoint 5 Control Register
static volatile xdata unsigned char	EP_CTRL6	@ 0x7F86;	// Endpoint 6 Control Register
static volatile xdata unsigned char	EP_CTRL7	@ 0x7F87;	// Endpoint 7 Control Register
static volatile xdata unsigned char	EP_CTRL8	@ 0x7F88;	// Endpoint 8 Control Register
static volatile xdata unsigned char	EP_CTRL9	@ 0x7F89;	// Endpoint 9 Control Register
static volatile xdata unsigned char	EP_CTRL10	@ 0x7F8A;	// Endpoint 10 Control Register
static volatile xdata unsigned char	EP_CTRL11	@ 0x7F8B;	// Endpoint 11 Control Register
static volatile xdata unsigned char	EP_CTRL12	@ 0x7F8C;	// Endpoint 12 Control Register
static volatile xdata unsigned char	EP_CTRL13	@ 0x7F8D;	// Endpoint 13 Control Register
static volatile xdata unsigned char	EP_CTRL14	@ 0x7F8E;	// Endpoint 14 Control Register
static volatile xdata unsigned char	EP_CTRL15	@ 0x7F8F;	// Endpoint 15 Control Register
static volatile xdata unsigned char	FRAMEL		@ 0x7F90;	// USB Frame Count Low
static volatile xdata unsigned char	FRAMEH		@ 0x7F91;	// USB Frame Count High
static		xdata unsigned char	SIE_ADDR	@ 0x7F92;	// USB Local Address Register
static volatile xdata unsigned char	SIE_STAT	@ 0x7F93;	// SIE Status Register
static volatile xdata unsigned char	SIE_CTRL	@ 0x7F94;	// SIE Control Register
static volatile xdata unsigned char	SIE_TST1	@ 0x7F95;	// Reserved Test Register
static volatile xdata unsigned char	SIE_TST2	@ 0x7F96;	// Reserved Test Register
static volatile xdata unsigned char	SIE_EP_TEST	@ 0x7F97;	// Reserved Test Register
static volatile xdata unsigned char	SIE_CONFIG	@ 0x7F98;	// SIE Configuration Register
static		xdata unsigned char	ALT_ADDR1	@ 0x7F99;	// Secondary Local Address Register #1
static volatile xdata unsigned char	SIE_TST3	@ 0x7F9A;	// Reserved Test Register
static volatile xdata unsigned char	SIE_TST4	@ 0x7F9B;	// Reserved Test Register
static volatile xdata unsigned char	SIE_TST5	@ 0x7F9C;	// Reserved Test Register
static volatile xdata unsigned char	SIE_TST6	@ 0x7F9D;	// Reserved Test Register
static		xdata unsigned char	ALT_ADDR2	@ 0x7F9E;	// Secondary Local Address Register #2
static		xdata unsigned char	ALT_ADDR3	@ 0x7F9F;	// Secondary Local Address Register #3

/*bit addressable locations*/
//Port 0 P0
static volatile bit	P00	@ 0x80;
static volatile bit	P01	@ 0x81;
static volatile bit	P02	@ 0x82;
static volatile bit	P03	@ 0x83;
static volatile bit	P04	@ 0x84;
static volatile bit	P05	@ 0x85;
static volatile bit	P06	@ 0x86;
static volatile bit	P07	@ 0x87;
// Alternate Functions
static volatile bit	AD0	@ 0x80;
static volatile bit	AD1	@ 0x81;
static volatile bit	AD2	@ 0x82;
static volatile bit	AD3	@ 0x83;
static volatile bit	AD4	@ 0x84;
static volatile bit	AD5	@ 0x85;
static volatile bit	AD6	@ 0x86;
static volatile bit	AD7	@ 0x87;

//Timer Control TCON
static 		bit	IT0	@ 0x88;
static volatile bit	IE0	@ 0x89;
static 		bit	IT1	@ 0x8A;
static volatile bit	IE1	@ 0x8B;
static 		bit	TR0	@ 0x8C;
static volatile bit	TF0	@ 0x8D;
static 		bit	TR1	@ 0x8E;
static volatile bit	TF1	@ 0x8F;

//Port 1 P1
static volatile bit	P10	@ 0x90;
static volatile bit	P11	@ 0x91;
static volatile bit	P12	@ 0x92;
static volatile bit	P13	@ 0x93;
static volatile bit	P14	@ 0x94;
static volatile bit	P15	@ 0x95;
static volatile bit	P16	@ 0x96;
static volatile bit	P17	@ 0x97;

//Serial Control SCON
static volatile bit	RI	@ 0x98;
static volatile bit	TI	@ 0x99;
static volatile bit	RB8	@ 0x9A;
static		bit	TB8	@ 0x9B;
static		bit	REN	@ 0x9C;
static		bit	SM2	@ 0x9D;
static		bit	SM1	@ 0x9E;
static		bit	SM0	@ 0x9F;

//Port 2 P2
static volatile bit	P20	@ 0xA0;
static volatile bit	P21	@ 0xA1;
static volatile bit	P22	@ 0xA2;
static volatile bit	P23	@ 0xA3;
static volatile bit	P24	@ 0xA4;
static volatile bit	P25	@ 0xA5;
static volatile bit	P26	@ 0xA6;
static volatile bit	P27	@ 0xA7;
// Alternate Functions
static volatile bit	A8	@ 0xA0;
static volatile bit	A9	@ 0xA1;
static volatile bit	A10	@ 0xA2;
static volatile bit	A11	@ 0xA3;
static volatile bit	A12	@ 0xA4;
static volatile bit	A13	@ 0xA5;
static volatile bit	A14	@ 0xA6;
static volatile bit	A15	@ 0xA7;

//Interrupt Enable IE
static		bit	EX0	@ 0xA8;
static		bit	ET0	@ 0xA9;
static		bit	EX1	@ 0xAA;
static		bit	ET1	@ 0xAB;
static 		bit	ES	@ 0xAC;
static 		bit	EA	@ 0xAF;

//Port 3 P3
static volatile bit	P30	@ 0xB0;
static volatile bit	P31	@ 0xB1;
static volatile bit	P32	@ 0xB2;
static volatile bit	P33	@ 0xB3;
static volatile bit	P34	@ 0xB4;
static volatile bit	P35	@ 0xB5;
static volatile bit	P36	@ 0xB6;
static volatile bit	P37	@ 0xB7;
// Alternate Functions
static volatile bit	RXD	@ 0xB0;
static volatile bit	TXD	@ 0xB1;
static volatile bit	INT0	@ 0xB2;
static volatile bit	INT1	@ 0xB3;
static volatile bit	T0	@ 0xB4;
static volatile bit	T1	@ 0xB5;
static volatile bit	WR	@ 0xB6;
static volatile bit	RD	@ 0xB7;

//Interrupt Priority
static 		bit	PX0	@ 0xB8;
static 		bit	PT0	@ 0xB9;
static 		bit	PX1	@ 0xBA;
static 		bit	PT1	@ 0xBB;
static 		bit	PS	@ 0xBC;

//Program Status Word PSW
static volatile bit	P	@ 0xD0;
static volatile bit	OV	@ 0xD2;
static 		bit	RS0	@ 0xD3;
static 		bit	RS1	@ 0xD4;
static volatile bit	F0	@ 0xD5;
static volatile bit	AC	@ 0xD6;
static volatile bit	CY	@ 0xD7;

//Accumulator ACC
static volatile bit	ACC0	@ 0xE0;
static volatile bit	ACC1	@ 0xE1;
static volatile bit	ACC2	@ 0xE2;
static volatile bit	ACC3	@ 0xE3;
static volatile bit	ACC4	@ 0xE4;
static volatile bit	ACC5	@ 0xE5;
static volatile bit	ACC6	@ 0xE6;
static volatile bit	ACC7	@ 0xE7;

//B register
static volatile bit	B0	@ 0xF0;
static volatile bit	B1	@ 0xF1;
static volatile bit	B2	@ 0xF2;
static volatile bit	B3	@ 0xF3;
static volatile bit	B4	@ 0xF4;
static volatile bit	B5	@ 0xF5;
static volatile bit	B6	@ 0xF6;
static volatile bit	B7	@ 0xF7;


/*	Interrupt vectors */
#define	RESET	0
#define	EXTINT0	0x03
#define TIMER0	0x0B
#define	EXTINT1	0x13
#define	TIMER1	0x1B
#define	SERIAL	0x23

#endif	
