
#ifndef	_HTC_H_
#warning Header file tusb3210.h included directly. Use #include <htc.h> instead.
#endif

/* header file for the TI microcontroller
	TUSB3210
 */

#ifndef	__TUSB3210_H

#define	__TUSB3210_H


typedef struct {
	unsigned B7:1;	/* this is the most significant bit */
	unsigned B6:1;
	unsigned B5:1;
	unsigned B4:1;
	unsigned B3:1;
	unsigned B2:1;
	unsigned B1:1;
	unsigned B0:1;
}	SFR_BITS;

// Special Function Registers
static volatile unsigned char	P0	@ 0x80;
static volatile unsigned char	SP	@ 0x81;
static volatile unsigned char	DPL	@ 0x82;
static volatile unsigned char	DPH	@ 0x83;
// 16 bit definition
static 		unsigned char	PCON	@ 0x87;
static volatile	unsigned char	TCON	@ 0x88;
static 		unsigned char	TMOD	@ 0x89;
static volatile unsigned char	TL0	@ 0x8A;
static volatile unsigned char	TL1	@ 0x8B;
static volatile unsigned char	TH0	@ 0x8C;
static volatile unsigned char	TH1	@ 0x8D;
static volatile unsigned char	P1	@ 0x90;
static 		unsigned char	SCON	@ 0x98;
static volatile unsigned char	SBUF	@ 0x99;
static volatile unsigned char	P2	@ 0xA0;
static 		unsigned char	IE	@ 0xA8;
static volatile unsigned char	P3	@ 0xB0;
static 		unsigned char	IP	@ 0xB8;
static volatile unsigned char	PSW	@ 0xD0;
static volatile unsigned char	ACC	@ 0xE0;
static volatile unsigned char	B	@ 0xF0;

static volatile SFR_BITS	P0_BITS		@ 0x80;
static 		SFR_BITS	PCON_BITS	@ 0x87;
static volatile	SFR_BITS	TCON_BITS	@ 0x88;
static 		SFR_BITS	TMOD_BITS	@ 0x89;
static volatile SFR_BITS	P1_BITS		@ 0x90;
static 		SFR_BITS	SCON_BITS	@ 0x98;
static volatile SFR_BITS	P2_BITS		@ 0xA0;
static 		SFR_BITS	IE_BITS		@ 0xA8;
static volatile SFR_BITS	P3_BITS		@ 0xB0;
static 		SFR_BITS	IP_BITS		@ 0xB8;
static volatile SFR_BITS	PSW_BITS	@ 0xD0;
static volatile SFR_BITS	ACC_BITS	@ 0xE0;
static volatile SFR_BITS	B_BITS		@ 0xF0;

// external special function registers XFRs
static volatile xdata unsigned char	FUNADR		@ 0xFFFF;	// Function address register
static volatile xdata unsigned char	USBSTA		@ 0xFFFE;	// USB status register
static		xdata unsigned char	USBMSK		@ 0xFFFD;	// USB interrupt mask register
static volatile xdata unsigned char	USBCTL		@ 0xFFFC;	// USB control register
static volatile xdata unsigned char	VIDSTA		@ 0xFFF6;	// VID/PID status register
static volatile xdata unsigned char	I2CADR		@ 0xFFF3;	// I2C address register
static volatile xdata unsigned char	I2CDAI		@ 0xFFF2;	// I2C data-input register
static volatile xdata unsigned char	I2CDAO		@ 0xFFF1;	// I2C data-output register
static volatile xdata unsigned char	I2CSTA		@ 0xFFF0;	// I2C status and control register
static		xdata unsigned char	PUR3		@ 0xFF97;	// 3 pullup resistor register
static		xdata unsigned char	PUR2		@ 0xFF96;	// 2 pullup resistor register
static		xdata unsigned char	PUR1		@ 0xFF95;	// 1 pullup resistor register
static		xdata unsigned char	PUR0		@ 0xFF94;	// 0 pullup resistor register
static volatile xdata unsigned char	WDCSR		@ 0xFF93;	// Watchdog timer, control & status register
static volatile xdata unsigned char	VECINT		@ 0xFF92;	// Vector interrupt register
static		xdata unsigned char	MCNFG		@ 0xFF90;	// MCU configuration register
static		xdata unsigned char	INTCFG		@ 0xFF84;	// Interrupt delay configuration register
static volatile xdata unsigned char	OEPBCNT_0	@ 0xFF83;	// Output endpoint-0 byte count register
static		xdata unsigned char	OEPCNFG_0	@ 0xFF82;	// Output endpoint-0 configuration register
static volatile xdata unsigned char	IEPBCNT_0	@ 0xFF81;	// Input endpoint-0 byte count register
static		xdata unsigned char	IEPCNFG_0	@ 0xFF80;	// Input endpoint-0 configuration register
static		xdata unsigned char	IEPCNFG_37	@ 0xFF5F;	// endpoint_3: configuration, byte 7
static		xdata unsigned char	IEPCNFG_36	@ 0xFF5E;	// endpoint_3: configuration, byte 6
static		xdata unsigned char	IEPCNFG_35	@ 0xFF5D;	// endpoint_3: configuration, byte 5
static		xdata unsigned char	IEPCNFG_34	@ 0xFF5C;	// endpoint_3: configuration, byte 4
static		xdata unsigned char	IEPCNFG_33	@ 0xFF5B;	// endpoint_3: configuration, byte 3
static		xdata unsigned char	IEPCNFG_32	@ 0xFF5A;	// endpoint_3: configuration, byte 2
static		xdata unsigned char	IEPCNFG_31	@ 0xFF59;	// endpoint_3: configuration, byte 1
static		xdata unsigned char	IEPCNFG_30	@ 0xFF58;	// endpoint_3: configuration, byte 0
static		xdata unsigned char	IEPCNFG_27	@ 0xFF57;	// endpoint_2: configuration, byte 7
static		xdata unsigned char	IEPCNFG_26	@ 0xFF56;	// endpoint_2: configuration, byte 6
static		xdata unsigned char	IEPCNFG_25	@ 0xFF55;	// endpoint_2: configuration, byte 5
static		xdata unsigned char	IEPCNFG_24	@ 0xFF54;	// endpoint_2: configuration, byte 4
static		xdata unsigned char	IEPCNFG_23	@ 0xFF53;	// endpoint_2: configuration, byte 3
static		xdata unsigned char	IEPCNFG_22	@ 0xFF52;	// endpoint_2: configuration, byte 2
static		xdata unsigned char	IEPCNFG_21	@ 0xFF51;	// endpoint_2: configuration, byte 1
static		xdata unsigned char	IEPCNFG_20	@ 0xFF50;	// endpoint_2: configuration, byte 0
static		xdata unsigned char	IEPCNFG_17	@ 0xFF4F;	// endpoint_1: configuration, byte 7
static		xdata unsigned char	IEPCNFG_16	@ 0xFF4E;	// endpoint_1: configuration, byte 6
static		xdata unsigned char	IEPCNFG_15	@ 0xFF4D;	// endpoint_1: configuration, byte 5
static		xdata unsigned char	IEPCNFG_14	@ 0xFF4C;	// endpoint_1: configuration, byte 4
static		xdata unsigned char	IEPCNFG_13	@ 0xFF4B;	// endpoint_1: configuration, byte 3
static		xdata unsigned char	IEPCNFG_12	@ 0xFF4A;	// endpoint_1: configuration, byte 2
static		xdata unsigned char	IEPCNFG_11	@ 0xFF49;	// endpoint_1: configuration, byte 1
static		xdata unsigned char	IEPCNFG_10	@ 0xFF48;	// endpoint_1: configuration, byte 0
static		xdata unsigned char	OEPCNFG_37	@ 0xFF1F;	// endpoint_3: configuration, byte 7
static		xdata unsigned char	OEPCNFG_36	@ 0xFF1E;	// endpoint_3: configuration, byte 6
static		xdata unsigned char	OEPCNFG_35	@ 0xFF1D;	// endpoint_3: configuration, byte 5
static		xdata unsigned char	OEPCNFG_34	@ 0xFF1C;	// endpoint_3: configuration, byte 4
static		xdata unsigned char	OEPCNFG_33	@ 0xFF1B;	// endpoint_3: configuration, byte 3
static		xdata unsigned char	OEPCNFG_32	@ 0xFF1A;	// endpoint_3: configuration, byte 2
static		xdata unsigned char	OEPCNFG_31	@ 0xFF19;	// endpoint_3: configuration, byte 1
static		xdata unsigned char	OEPCNFG_30	@ 0xFF18;	// endpoint_3: configuration, byte 0
static		xdata unsigned char	OEPCNFG_27	@ 0xFF17;	// endpoint_2: configuration, byte 7
static		xdata unsigned char	OEPCNFG_26	@ 0xFF16;	// endpoint_2: configuration, byte 6
static		xdata unsigned char	OEPCNFG_25	@ 0xFF15;	// endpoint_2: configuration, byte 5
static		xdata unsigned char	OEPCNFG_24	@ 0xFF14;	// endpoint_2: configuration, byte 4
static		xdata unsigned char	OEPCNFG_23	@ 0xFF13;	// endpoint_2: configuration, byte 3
static		xdata unsigned char	OEPCNFG_22	@ 0xFF12;	// endpoint_2: configuration, byte 2
static		xdata unsigned char	OEPCNFG_21	@ 0xFF11;	// endpoint_2: configuration, byte 1
static		xdata unsigned char	OEPCNFG_20	@ 0xFF10;	// endpoint_2: configuration, byte 0
static		xdata unsigned char	OEPCNFG_17	@ 0xFF0F;	// endpoint_1: configuration, byte 7
static		xdata unsigned char	OEPCNFG_16	@ 0xFF0E;	// endpoint_1: configuration, byte 6
static		xdata unsigned char	OEPCNFG_15	@ 0xFF0D;	// endpoint_1: configuration, byte 5
static		xdata unsigned char	OEPCNFG_14	@ 0xFF0C;	// endpoint_1: configuration, byte 4
static		xdata unsigned char	OEPCNFG_13	@ 0xFF0B;	// endpoint_1: configuration, byte 3
static		xdata unsigned char	OEPCNFG_12	@ 0xFF0A;	// endpoint_1: configuration, byte 2
static		xdata unsigned char	OEPCNFG_11	@ 0xFF09;	// endpoint_1: configuration, byte 1
static		xdata unsigned char	OEPCNFG_10	@ 0xFF08;	// endpoint_1: configuration, byte 0
static		xdata unsigned char	SETUP_PKT7	@ 0xFF07;	// packet block, byte 7
static		xdata unsigned char	SETUP_PKT6	@ 0xFF06;	// packet block, byte 6
static		xdata unsigned char	SETUP_PKT5	@ 0xFF05;	// packet block, byte 5
static		xdata unsigned char	SETUP_PKT4	@ 0xFF04;	// packet block, byte 4
static		xdata unsigned char	SETUP_PKT3	@ 0xFF03;	// packet block, byte 3
static		xdata unsigned char	SETUP_PKT2	@ 0xFF02;	// packet block, byte 2
static		xdata unsigned char	SETUP_PKT1	@ 0xFF01;	// packet block, byte 1
static		xdata unsigned char	SETUP_PKT0	@ 0xFF00;	// packet block, byte 0
static volatile xdata unsigned char	INEND07		@ 0xFEFF;	// endpoint_0 buffer 7
static volatile xdata unsigned char	INEND06		@ 0xFEFE;	// endpoint_0 buffer 6
static volatile xdata unsigned char	INEND05		@ 0xFEFD;	// endpoint_0 buffer 5
static volatile xdata unsigned char	INEND04		@ 0xFEFC;	// endpoint_0 buffer 4
static volatile xdata unsigned char	INEND03		@ 0xFEFB;	// endpoint_0 buffer 3
static volatile xdata unsigned char	INEND02		@ 0xFEFA;	// endpoint_0 buffer 2
static volatile xdata unsigned char	INEND01		@ 0xFEF9;	// endpoint_0 buffer 1
static volatile xdata unsigned char	INEND00		@ 0xFEF8;	// endpoint_0 buffer 0
static volatile xdata unsigned char	OUTEND07	@ 0xFEF7;	// endpoint_0 buffer 7
static volatile xdata unsigned char	OUTEND06	@ 0xFEF6;	// endpoint_0 buffer 6
static volatile xdata unsigned char	OUTEND05	@ 0xFEF5;	// endpoint_0 buffer 5
static volatile xdata unsigned char	OUTEND04	@ 0xFEF4;	// endpoint_0 buffer 4
static volatile xdata unsigned char	OUTEND03	@ 0xFEF3;	// endpoint_0 buffer 3
static volatile xdata unsigned char	OUTEND02	@ 0xFEF2;	// endpoint_0 buffer 2
static volatile xdata unsigned char	OUTEND01	@ 0xFEF1;	// endpoint_0 buffer 1
static volatile xdata unsigned char	OUTEND00	@ 0xFEF0;	// endpoint_0 buffer 0

/* bit addressable locations */
// Port 0 P0
static volatile bit	P00	@ 0x80;
static volatile bit	P01	@ 0x81;
static volatile bit	P02	@ 0x82;
static volatile bit	P03	@ 0x83;
static volatile bit	P04	@ 0x84;
static volatile bit	P05	@ 0x85;
static volatile bit	P06	@ 0x86;
static volatile bit	P07	@ 0x87;
// Alternate Functions
static volatile bit	AD0	@ 0x80;
static volatile bit	AD1	@ 0x81;
static volatile bit	AD2	@ 0x82;
static volatile bit	AD3	@ 0x83;
static volatile bit	AD4	@ 0x84;
static volatile bit	AD5	@ 0x85;
static volatile bit	AD6	@ 0x86;
static volatile bit	AD7	@ 0x87;

// Timer Control TCON
static 		bit	IT0	@ 0x88;
static volatile bit	IE0	@ 0x89;
static 		bit	IT1	@ 0x8A;
static volatile bit	IE1	@ 0x8B;
static 		bit	TR0	@ 0x8C;
static volatile bit	TF0	@ 0x8D;
static 		bit	TR1	@ 0x8E;
static volatile bit	TF1	@ 0x8F;

// Port 1 P1
static volatile bit	P10	@ 0x90;
static volatile bit	P11	@ 0x91;
static volatile bit	P12	@ 0x92;
static volatile bit	P13	@ 0x93;
static volatile bit	P14	@ 0x94;
static volatile bit	P15	@ 0x95;
static volatile bit	P16	@ 0x96;
static volatile bit	P17	@ 0x97;

// Serial Control SCON
static volatile bit	RI	@ 0x98;
static volatile bit	TI	@ 0x99;
static volatile bit	RB8	@ 0x9A;
static		bit	TB8	@ 0x9B;
static		bit	REN	@ 0x9C;
static		bit	SM2	@ 0x9D;
static		bit	SM1	@ 0x9E;
static		bit	SM0	@ 0x9F;

// Port 2 P2
static volatile bit	P20	@ 0xA0;
static volatile bit	P21	@ 0xA1;
static volatile bit	P22	@ 0xA2;
static volatile bit	P23	@ 0xA3;
static volatile bit	P24	@ 0xA4;
static volatile bit	P25	@ 0xA5;
static volatile bit	P26	@ 0xA6;
static volatile bit	P27	@ 0xA7;
// Alternate Functions
static volatile bit	A8	@ 0xA0;
static volatile bit	A9	@ 0xA1;
static volatile bit	A10	@ 0xA2;
static volatile bit	A11	@ 0xA3;
static volatile bit	A12	@ 0xA4;
static volatile bit	A13	@ 0xA5;
static volatile bit	A14	@ 0xA6;
static volatile bit	A15	@ 0xA7;

// Interrupt Enable IE
static		bit	EX0	@ 0xA8;
static		bit	ET0	@ 0xA9;
static		bit	EX1	@ 0xAA;
static		bit	ET1	@ 0xAB;
static 		bit	ES	@ 0xAC;
static 		bit	EA	@ 0xAF;

// Port 3 P3
static volatile bit	P30	@ 0xB0;
static volatile bit	P31	@ 0xB1;
static volatile bit	P32	@ 0xB2;
static volatile bit	P33	@ 0xB3;
static volatile bit	P34	@ 0xB4;
static volatile bit	P35	@ 0xB5;
static volatile bit	P36	@ 0xB6;
static volatile bit	P37	@ 0xB7;
// Alternate Functions
static volatile bit	RXD	@ 0xB0;
static volatile bit	TXD	@ 0xB1;
static volatile bit	INT0	@ 0xB2;
static volatile bit	INT1	@ 0xB3;
static volatile bit	T0	@ 0xB4;
static volatile bit	T1	@ 0xB5;
static volatile bit	WR	@ 0xB6;
static volatile bit	RD	@ 0xB7;

// Interrupt Priority
static 		bit	PX0	@ 0xB8;
static 		bit	PT0	@ 0xB9;
static 		bit	PX1	@ 0xBA;
static 		bit	PT1	@ 0xBB;
static 		bit	PS	@ 0xBC;

// Program Status Word PSW
static volatile bit	P	@ 0xD0;
static volatile bit	OV	@ 0xD2;
static 		bit	RS0	@ 0xD3;
static 		bit	RS1	@ 0xD4;
static volatile bit	F0	@ 0xD5;
static volatile bit	AC	@ 0xD6;
static volatile bit	CY	@ 0xD7;

// Accumulator ACC
static volatile bit	ACC0	@ 0xE0;
static volatile bit	ACC1	@ 0xE1;
static volatile bit	ACC2	@ 0xE2;
static volatile bit	ACC3	@ 0xE3;
static volatile bit	ACC4	@ 0xE4;
static volatile bit	ACC5	@ 0xE5;
static volatile bit	ACC6	@ 0xE6;
static volatile bit	ACC7	@ 0xE7;

// B register
static volatile bit	B0	@ 0xF0;
static volatile bit	B1	@ 0xF1;
static volatile bit	B2	@ 0xF2;
static volatile bit	B3	@ 0xF3;
static volatile bit	B4	@ 0xF4;
static volatile bit	B5	@ 0xF5;
static volatile bit	B6	@ 0xF6;
static volatile bit	B7	@ 0xF7;


/*	Interrupt vectors */
#define	RESET	0
#define	EXTINT0	0x03
#define TIMER0	0x0B
#define	EXTINT1	0x13
#define	TIMER1	0x1B
#define	SERIAL	0x23

#endif	
