
#ifndef	_HTC_H_
#warning Header file cc2430.h included directly. Use #include <htc.h> instead.
#endif

 /* header file for the Chipcon microcontrollers
	CC2430F32
	CC2430F64
	CC2430F128
 */

#ifndef	__CC2430_H

#define	__CC2430_H

typedef struct {
	unsigned B7:1; //This is the most signifigant bit
	unsigned B6:1;
	unsigned B5:1;
	unsigned B4:1;
	unsigned B3:1;
	unsigned B2:1;
	unsigned B1:1;
	unsigned B0:1;
}	SFR_BITS;

//Special Function Registers
static volatile unsigned char P0	@ 0x80;
static volatile unsigned char SP	@ 0x81;
static volatile unsigned char DPL0	@ 0x82;
static volatile unsigned char DPH0	@ 0x83;
static volatile unsigned char DPL1	@ 0x84;
static volatile unsigned char DPH1	@ 0x85;
static volatile unsigned char U0CSR	@ 0x86;
static volatile unsigned char PCON	@ 0x87;
static volatile unsigned char TCON	@ 0x88;
static volatile unsigned char P0IFG	@ 0x89;
static volatile unsigned char P1IFG	@ 0x8A;
static volatile unsigned char P2IFG	@ 0x8B;
static          unsigned char PICTL	@ 0x8C;
static          unsigned char P1IEN	@ 0x8D;
static          unsigned char P0INP	@ 0x8F;
static volatile unsigned char P1	@ 0x90;
static          unsigned char RFIM	@ 0x91;
static          unsigned char DPS	@ 0x92;
static          unsigned char MPAGE	@ 0x93;
static          unsigned char T2CMP	@ 0x94;
static volatile unsigned char ST0	@ 0x95;
static volatile unsigned char ST1	@ 0x96;
static volatile unsigned char ST2	@ 0x97;
static volatile unsigned char S0CON	@ 0x98;
static volatile unsigned char HSRC	@ 0x99;
static          unsigned char IEN2	@ 0x9A;
static volatile unsigned char S1CON	@ 0x9B;
static volatile unsigned char T2PEROF0	@ 0x9C;
static volatile unsigned char T2PEROF1	@ 0x9D;
static volatile unsigned char T2PEROF2	@ 0x9E;
static volatile unsigned char P2	@ 0xA0;
static volatile unsigned char T2OF0	@ 0xA1;
static volatile unsigned char T2OF1	@ 0xA2;
static volatile unsigned char T2OF2	@ 0xA3;
static volatile unsigned char T2CAPLPL	@ 0xA4;
static volatile unsigned char T2CAPHPH	@ 0xA5;
static          unsigned char T2TLD	@ 0xA6;
static          unsigned char T2THD	@ 0xA7;
static          unsigned char IEN0	@ 0xA8;
static          unsigned char IP0	@ 0xA9;
static          unsigned char FWT	@ 0xAB;
static          unsigned char FADDRL	@ 0xAC;
static          unsigned char FADDRH	@ 0xAD;
static volatile unsigned char FCTL	@ 0xAE;
static volatile unsigned char FWDATA	@ 0xAF;
static volatile unsigned char ENCDI	@ 0xB1;
static volatile unsigned char ENCDO	@ 0xB2;
static volatile unsigned char ENCCS	@ 0xB3;
static volatile unsigned char ADCCON1	@ 0xB4;
static          unsigned char ADCCON2	@ 0xB5;
static          unsigned char ADCCON3	@ 0xB6;
static volatile unsigned char RCCTL	@ 0xB7;
static          unsigned char IEN1	@ 0xB8;
static          unsigned char IP1	@ 0xB9;
static volatile unsigned char ADCL	@ 0xBA;
static volatile unsigned char ADCH	@ 0xBB;
static volatile unsigned char RNDL	@ 0xBC;
static volatile unsigned char RNDH	@ 0xBD;
static volatile unsigned char SLEEP	@ 0xBE;
static volatile unsigned char IRCON	@ 0xC0;
static volatile unsigned char U0BUF	@ 0xC1;
static          unsigned char U0BAUD	@ 0xC2;
static volatile unsigned char T2CNF	@ 0xC3;
static volatile unsigned char U0UCR	@ 0xC4;
static          unsigned char U0GCR	@ 0xC5;
static          unsigned char CLKCON	@ 0xC6;
static          unsigned char MEMCTR	@ 0xC7;
static volatile unsigned char T2CON	@ 0xC8;
static volatile unsigned char WDCTL	@ 0xC9;
static volatile unsigned char T3CNT	@ 0xCA;
static volatile unsigned char T3CTL	@ 0xCB;
static          unsigned char T3CCTL0	@ 0xCC;
static volatile unsigned char T3CC0	@ 0xCD;
static          unsigned char T3CCTL1	@ 0xCE;
static volatile unsigned char T3CC1	@ 0xCF;
static volatile unsigned char PSW	@ 0xD0;
static volatile unsigned char DMAIRQ	@ 0xD1;
static          unsigned char DMA1CFGL	@ 0xD2;
static          unsigned char DMA1CFGH	@ 0xD3;
static          unsigned char DMA0CFGL	@ 0xD4;
static          unsigned char DMA0CFGH	@ 0xD5;
static volatile unsigned char DMAARM	@ 0xD6;
static volatile unsigned char DMAREQ	@ 0xD7;
static volatile unsigned char TIMIF	@ 0xD8;
static volatile unsigned char RFD	@ 0xD9;
static volatile unsigned char T1CC0L	@ 0xDA;
static volatile unsigned char T1CC0H	@ 0xDB;
static volatile unsigned char T1CC1L	@ 0xDC;
static volatile unsigned char T1CC1H	@ 0xDD;
static volatile unsigned char T1CC2L	@ 0xDE;
static volatile unsigned char T1CC2H	@ 0xDF;
static volatile unsigned char ACC	@ 0xE0;
static          unsigned char RFST	@ 0xE1;
static volatile unsigned char T1CNTL	@ 0xE2;
static volatile unsigned char T1CNTH	@ 0xE3;
static volatile unsigned char T1CTL	@ 0xE4;
static          unsigned char T1CCTL0	@ 0xE5;
static          unsigned char T1CCTL1	@ 0xE6;
static          unsigned char T1CCTL2	@ 0xE7;
static volatile unsigned char IRCON2	@ 0xE8;
static volatile unsigned char RFIF	@ 0xE9;
static volatile unsigned char T4CNT	@ 0xEA;
static volatile unsigned char T4CTL	@ 0xEB;
static          unsigned char T4CCTL0	@ 0xEC;
static volatile unsigned char T4CC0	@ 0xED;
static          unsigned char T4CCTL1	@ 0xEE;
static volatile unsigned char T4CC1	@ 0xEF;
static volatile unsigned char B		@ 0xF0;
static          unsigned char PERCFG	@ 0xF1;
static          unsigned char ADCCFG	@ 0xF2;
static          unsigned char P0SEL	@ 0xF3;
static          unsigned char P1SEL	@ 0xF4;
static          unsigned char P2SEL	@ 0xF5;
static          unsigned char P1INP	@ 0xF6;
static          unsigned char P2INP	@ 0xF7;
static volatile unsigned char U1CSR	@ 0xF8;
static volatile unsigned char U1BUF	@ 0xF9;
static          unsigned char U1BAUD	@ 0xFA;
static volatile unsigned char U1UCR	@ 0xFB;
static          unsigned char U1GCR	@ 0xFC;
static          unsigned char P0DIR	@ 0xFD;
static          unsigned char P1DIR	@ 0xFE;
static          unsigned char P2DIR	@ 0xFF;

static volatile SFR_BITS	 P0_BITS	@ 0x80;
static volatile SFR_BITS	 U0CSR_BITS	@ 0x86;
static volatile SFR_BITS	 PCON_BITS	@ 0x87;
static volatile SFR_BITS	 TCON_BITS	@ 0x88;
static volatile SFR_BITS	 P0IFG_BITS	@ 0x89;
static volatile SFR_BITS	 P1IFG_BITS	@ 0x8A;
static volatile SFR_BITS	 P2IFG_BITS	@ 0x8B;
static          SFR_BITS	 PICTL_BITS	@ 0x8C;
static          SFR_BITS	 P1IEN_BITS	@ 0x8D;
static          SFR_BITS	 P0INP_BITS	@ 0x8F;
static volatile SFR_BITS	 P1_BITS	@ 0x90;
static          SFR_BITS	 RFIM_BITS	@ 0x91;
static          SFR_BITS	 DPS_BITS	@ 0x92;
static volatile SFR_BITS	 S0CON_BITS	@ 0x98;
static volatile SFR_BITS	 HSRC_BITS	@ 0x99;
static volatile SFR_BITS	 IEN2_BITS	@ 0x9A;
static volatile SFR_BITS	 S1CON_BITS	@ 0x9B;
static volatile SFR_BITS	 T2PEROF0_BITS	@ 0x9C;
static volatile SFR_BITS	 T2PEROF1_BITS	@ 0x9D;
static volatile SFR_BITS	 T2PEROF2_BITS	@ 0x9E;
static volatile SFR_BITS	 P2_BITS	@ 0xA0;
static          SFR_BITS	 IEN0_BITS	@ 0xA8;
static          SFR_BITS	 IP0_BITS	@ 0xA9;
static          SFR_BITS	 FWT_BITS	@ 0xAB;
static volatile SFR_BITS	 FCTL_BITS	@ 0xAE;
static volatile SFR_BITS	 ENCDI_BITS	@ 0xB1;
static volatile SFR_BITS	 ENCDO_BITS	@ 0xB2;
static volatile SFR_BITS	 ENCCS_BITS	@ 0xB3;
static volatile SFR_BITS	 ADCCON1_BITS	@ 0xB4;
static          SFR_BITS	 ADCCON2_BITS	@ 0xB5;
static          SFR_BITS	 ADCCON3_BITS	@ 0xB6;
static volatile SFR_BITS	 RCCTL_BITS	@ 0xB7;
static          SFR_BITS	 IEN1_BITS	@ 0xB8;
static          SFR_BITS	 IP1_BITS	@ 0xB9;
static volatile SFR_BITS	 SLEEP_BITS	@ 0xBE;
static volatile SFR_BITS	 IRCON_BITS	@ 0xC0;
static volatile SFR_BITS	 T2CNF_BITS	@ 0xC3;
static volatile SFR_BITS	 U0UCR_BITS	@ 0xC4;
static volatile SFR_BITS	 U0GCR_BITS	@ 0xC5;
static          SFR_BITS	 CLKCON_BITS	@ 0xC6;
static          SFR_BITS	 MEMCTR_BITS	@ 0xC7;
static volatile SFR_BITS	 T2CON_BITS	@ 0xC8;
static volatile SFR_BITS	 WDCTL_BITS	@ 0xC9;
static volatile SFR_BITS	 T3CTL_BITS	@ 0xCB;
static          SFR_BITS	 T3CCTL0_BITS	@ 0xCC;
static          SFR_BITS	 T3CCTL1_BITS	@ 0xCE;
static volatile SFR_BITS	 PSW_BITS	@ 0xD0;
static volatile SFR_BITS	 DMAIRQ_BITS	@ 0xD1;
static volatile SFR_BITS	 DMAARM_BITS	@ 0xD6;
static volatile SFR_BITS	 DMAREQ_BITS	@ 0xD7;
static volatile SFR_BITS	 TIMIF_BITS	@ 0xD8;
static volatile SFR_BITS	 ACC_BITS	@ 0xE0;
static          SFR_BITS	 T1CTL_BITS	@ 0xE4;
static volatile SFR_BITS	 T1CCTL0_BITS	@ 0xE5;
static volatile SFR_BITS	 T1CCTL1_BITS	@ 0xE6;
static volatile SFR_BITS	 T1CCTL2_BITS	@ 0xE7;
static volatile SFR_BITS	 IRCON2_BITS	@ 0xE8;
static volatile SFR_BITS	 RFIF_BITS	@ 0xE9;
static volatile SFR_BITS	 T4CTL_BITS	@ 0xEB;
static          SFR_BITS	 T4CCTL0_BITS	@ 0xEC;
static          SFR_BITS	 T4CCTL1_BITS	@ 0xEE;
static volatile SFR_BITS	 B_BITS		@ 0xF0;
static          SFR_BITS	 PERCFG_BITS	@ 0xF1;
static          SFR_BITS	 ADCCFG_BITS	@ 0xF2;
static          SFR_BITS	 P0SEL_BITS	@ 0xF3;
static          SFR_BITS	 P1SEL_BITS	@ 0xF4;
static          SFR_BITS	 P2SEL_BITS	@ 0xF5;
static          SFR_BITS	 P1INP_BITS	@ 0xF6;
static          SFR_BITS	 P2INP_BITS	@ 0xF7;
static volatile SFR_BITS	 U1CSR_BITS	@ 0xF8;
static volatile SFR_BITS	 U1BUF_BITS	@ 0xF9;
static          SFR_BITS	 U1BAUD_BITS	@ 0xFA;
static volatile SFR_BITS	 U1UCR_BITS	@ 0xFB;
static          SFR_BITS	 U1GCR_BITS	@ 0xFC;
static          SFR_BITS	 P0DIR_BITS	@ 0xFD;
static          SFR_BITS	 P1DIR_BITS	@ 0xFE;
static          SFR_BITS	 P2DIR_BITS	@ 0xFF;


// Bit Addressable Locations
// Port 0 P0
static volatile bit	P00	@ 0x80;
static volatile bit	P01	@ 0x81;
static volatile bit	P02	@ 0x82;
static volatile bit	P03	@ 0x83;
static volatile bit	P04	@ 0x84;
static volatile bit	P05	@ 0x85;
static volatile bit	P06	@ 0x86;
static volatile bit	P07	@ 0x87;

// Timer Control TCON
static 		bit	IT0	@ 0x88;
static volatile bit	RFERRIF	@ 0x89;
static 		bit	IT1	@ 0x8A;
static volatile bit	URX0IF	@ 0x8B;
static volatile bit	ADIF	@ 0x8D;
static volatile bit	URX1IF	@ 0x8F;

// Port 1 P1
static volatile bit	P10	@ 0x90;
static volatile bit	P11	@ 0x91;
static volatile bit	P12	@ 0x92;
static volatile bit	P13	@ 0x93;
static volatile bit	P14	@ 0x94;
static volatile bit	P15	@ 0x95;
static volatile bit	P16	@ 0x96;
static volatile bit	P17	@ 0x97;

// Serial Control 0 S0CON
static volatile bit 	ENCIF_1	@ 0x98;
static volatile bit 	ENCIF_0	@ 0x99;

// Port 2 P2
static volatile bit	P20	@ 0xA0;
static volatile bit	P21	@ 0xA1;
static volatile bit	P22	@ 0xA2;
static volatile bit	P23	@ 0xA3;
static volatile bit	P24	@ 0xA4;
static volatile bit	P25	@ 0xA5;
static volatile bit	P26	@ 0xA6;
static volatile bit	P27	@ 0xA7;

// Interrupt Enable 0 IEN0
static 		bit 	RFERRIE	@ 0xA8;
static 		bit 	ADCIE 	@ 0xA9;
static 		bit 	URX0IE 	@ 0xAA;
static 		bit 	URX1IE 	@ 0xAB;
static 		bit 	ENCIE 	@ 0xAC;
static 		bit 	STIE 	@ 0xAD;
static 		bit 	EAL	@ 0xAF;

// Interrupt Enable 1 IEN1
static 		bit 	DMAIE	@ 0xB8;
static 		bit 	T1IE	@ 0xB9;
static 		bit 	T2IE	@ 0xBA;
static 		bit 	T3IE	@ 0xBB;
static 		bit 	T4IE	@ 0xBC;
static 		bit 	P0IE	@ 0xBD;

// register IRCON - Interrupt flags 4
static volatile bit 	DMAIF	@ 0xC0;
static volatile bit 	T1IF	@ 0xC1;
static volatile bit 	T2IF	@ 0xC2;
static volatile bit 	T3IF	@ 0xC3;
static volatile bit 	T4IF	@ 0xC4;
static volatile bit 	P0IF	@ 0xC5;
static volatile bit 	STIF	@ 0xC7;

// Timer 2 Control T2CON - reserved and unused

// Program Status Word PSW
static volatile bit	P	@ 0xD0;
static volatile bit	F1	@ 0xD1;
static volatile bit	OV	@ 0xD2;
static 		bit	RS0	@ 0xD3;
static 		bit	RS1	@ 0xD4;
static volatile bit	F0	@ 0xD5;
static volatile bit	AC	@ 0xD6;
static volatile bit	CY	@ 0xD7;

// register TIMIF - Timers 1/3/4 interrupt flag/mask
static volatile bit	T3OVFIF	@ 0xD8;
static volatile bit	T3RCH0F	@ 0xD9;
static volatile bit	T3CH1IF	@ 0xDA;
static volatile bit	T4OVFIF	@ 0xDB;
static volatile bit	T4CH0IF	@ 0xDC;
static volatile bit	T4CH1IF	@ 0xDD;
static volatile bit	OVFIM	@ 0xDE;

// Accumulator ACC
static volatile bit	ACC0	@ 0xE0;
static volatile bit	ACC1	@ 0xE1;
static volatile bit	ACC2	@ 0xE2;
static volatile bit	ACC3	@ 0xE3;
static volatile bit	ACC4	@ 0xE4;
static volatile bit	ACC5	@ 0xE5;
static volatile bit	ACC6	@ 0xE6;
static volatile bit	ACC7	@ 0xE7;

// register IRCON2 - Interrupt flags 5
static volatile bit	P2IF	@ 0xE8;
static volatile bit	UTX0IF	@ 0xE9;
static volatile bit	UTX1IF	@ 0xEA;
static volatile bit	P1IF	@ 0xEB;
static volatile bit	WDTIF	@ 0xEC;

// B register
static volatile bit	B0	@ 0xF0;
static volatile bit	B1	@ 0xF1;
static volatile bit	B2	@ 0xF2;
static volatile bit	B3	@ 0xF3;
static volatile bit	B4	@ 0xF4;
static volatile bit	B5	@ 0xF5;
static volatile bit	B6	@ 0xF6;
static volatile bit	B7	@ 0xF7;

// definitions for register U1CSR
static volatile bit	ACTIVE	@ 0xF8;
static volatile bit	TX_BYTE	@ 0xF9;
static volatile bit	RX_BYTE	@ 0xFA;
static volatile bit	ERR	@ 0xFB;
static volatile bit	FE	@ 0xFC;
static          bit	SLAVE	@ 0xFD;
static          bit	RE	@ 0xFE;
static          bit	MODE	@ 0xFF;



// Interrupt Vectors
#define	RESET		0
#define	RF_ERROR	0x03
#define ADC		0x0B
#define	USART0_RX	0x13
#define	USART1_RX	0x1B
#define	AES		0x23
#define	SLEEP_TIMER	0x2B
#define	PORT2_IN	0x33
#define	USART0_TX	0x3B
#define	DMA		0x43
#define	TIMER1		0x4B
#define	TIMER2		0x53
#define	TIMER3		0x5B
#define	TIMER4		0x63
#define	PORT0_IN	0x6B
#define	USART1_TX	0x73
#define	PORT1_IN	0x7B
#define	GENERAL_RF	0x83
#define	WDT		0x8B

#endif
