/*
 *	Header file for Cypress 7C695x Microcontroller
 */


static volatile unsigned char		INDF		@ 0x00;
static volatile unsigned char		PCL		@ 0x02;
static volatile unsigned char		STATUS		@ 0x03;
static volatile unsigned char		STAT		@ 0x03;
static          unsigned char		FSR		@ 0x04;
static          unsigned char		PCLATH		@ 0x0A;
static volatile unsigned char		INTCON		@ 0x0B;
static volatile unsigned char		PORTB		@ 0x06;
static 		unsigned char bank1	TRISB		@ 0x86;
static volatile	unsigned char		ICKBUG		@ 0x0E;
static volatile	unsigned char		BIGBUG  	@ 0x0F;
static volatile unsigned char		EXTDATA1	@ 0x10;
static volatile unsigned char		EXTDATA2	@ 0x11;
static 		unsigned char		EXTADDR1L	@ 0x12;
static 		unsigned char		EXTADDR1H	@ 0x13;
static 		unsigned char		EXTADDR2L	@ 0x14;
static 		unsigned char		EXTADDR2H	@ 0x15;
static volatile unsigned char		DIAG		@ 0x7F;


/*	STATUS bits	*/
static volatile bit	IRP     @ (unsigned)&STATUS*8+7;
static volatile bit	RP1     @ (unsigned)&STATUS*8+6;
static volatile bit	RP0     @ (unsigned)&STATUS*8+5;
static volatile bit	TO	@ (unsigned)&STATUS*8+4;
static volatile bit	PD	@ (unsigned)&STATUS*8+3;
static volatile bit	ZERO    @ (unsigned)&STATUS*8+2;
static volatile bit	DC      @ (unsigned)&STATUS*8+1;
static volatile bit	CARRY   @ (unsigned)&STATUS*8+0;

/*	INTCON bits	*/
static volatile bit	GIE	@ (unsigned)&INTCON*8+7;
static volatile bit	PEIE	@ (unsigned)&INTCON*8+6;
static volatile bit	T0IE	@ (unsigned)&INTCON*8+5;
static volatile bit	TMR0IE	@ (unsigned)&INTCON*8+5;
static volatile bit	INTE	@ (unsigned)&INTCON*8+4;
static volatile bit	RBIE	@ (unsigned)&INTCON*8+3;
static volatile bit	T0IF	@ (unsigned)&INTCON*8+2;
static volatile bit	TMR0IF	@ (unsigned)&INTCON*8+2;
static volatile bit	INTF	@ (unsigned)&INTCON*8+1;
static volatile bit	RBIF	@ (unsigned)&INTCON*8+0;

/*      PORTB bits      */
static volatile bit	RB7	@ (unsigned)&PORTB*8+7;
static volatile bit	RB6	@ (unsigned)&PORTB*8+6;
static volatile bit	RB5	@ (unsigned)&PORTB*8+5;
static volatile bit	RB4	@ (unsigned)&PORTB*8+4;
static volatile bit	RB3	@ (unsigned)&PORTB*8+3;
static volatile bit	RB2	@ (unsigned)&PORTB*8+2;
static volatile bit	RB1	@ (unsigned)&PORTB*8+1;
static volatile bit	RB0	@ (unsigned)&PORTB*8+0;

/*      TRISB bits      */
static bank1 bit	TRISB7	@ (unsigned)&TRISB*8+7;
static bank1 bit	TRISB6	@ (unsigned)&TRISB*8+6;
static bank1 bit	TRISB5	@ (unsigned)&TRISB*8+5;
static bank1 bit	TRISB4	@ (unsigned)&TRISB*8+4;
static bank1 bit	TRISB3	@ (unsigned)&TRISB*8+3;
static bank1 bit	TRISB2	@ (unsigned)&TRISB*8+2;
static bank1 bit	TRISB1	@ (unsigned)&TRISB*8+1;
static bank1 bit	TRISB0	@ (unsigned)&TRISB*8+0;

