
#ifndef	_HTC_H_
#warning Header file c515c.h included directly. Use #include <htc.h> instead.
#endif

/*header file for the SIEMENS C515C Microcontrollers
	C515C_8R
	C515C_8E 
	C515C_L 
 */

#ifndef	__C515C_H

#define	__C515C_H
	
typedef struct {
	unsigned B7:1;	/* this is the most significant bit */
	unsigned B6:1;
	unsigned B5:1;
	unsigned B4:1;
	unsigned B3:1;
	unsigned B2:1;
	unsigned B1:1;
	unsigned B0:1;
}	SFR_BITS;

static volatile unsigned char		P0	@ 0x80;
static volatile unsigned char		SP	@ 0x81;
static volatile unsigned char		DPL	@ 0x82;
static volatile unsigned char		DPH	@ 0x83;
// 16 bit definition
static		unsigned char		WDTREL	@ 0x86;
static 		unsigned char		PCON	@ 0x87;
static volatile	unsigned char		TCON	@ 0x88;
// PCON1 SFR in mapped region
static volatile unsigned char		PCON1	@ 0x88;
static 		unsigned char		TMOD	@ 0x89;
static volatile unsigned char		TL0	@ 0x8A;
static volatile unsigned char		TL1	@ 0x8B;
static volatile unsigned char		TH0	@ 0x8C;
static volatile unsigned char		TH1	@ 0x8D;
static volatile unsigned char		P1	@ 0x90;
static		unsigned char		XPAGE	@ 0x91;
static		unsigned char		DPSEL	@ 0x92;
static volatile unsigned char		SSCCON	@ 0x93;
static		unsigned char		STB	@ 0x94;
static volatile unsigned char		SRB	@ 0x95;
static volatile unsigned char		SSCMOD	@ 0x96;
static volatile	unsigned char		SCON	@ 0x98;
static volatile unsigned char		SBUF	@ 0x99;
static 		unsigned char		IEN2	@ 0x9A;
static volatile unsigned char		P2	@ 0xA0;
static 		unsigned char		IEN0	@ 0xA8;
static 		unsigned char		IP0	@ 0xA9;
static		unsigned char		SRELL	@ 0xAA;
static volatile unsigned char		SCF	@ 0xAB;
static		unsigned char		SCIEN	@ 0xAC;
static volatile unsigned char		P3	@ 0xB0;
static volatile unsigned char		SYSCON	@ 0xB1;
static		unsigned char		IEN1	@ 0xB8;
static 		unsigned char		IP1	@ 0xB9;
static 		unsigned char		SRELH	@ 0xBA;
static volatile	unsigned char		IRCON	@ 0xC0;
static		unsigned char		CCEN	@ 0xC1;
static volatile unsigned char		CCL1	@ 0xC2;
static volatile unsigned char		CCH1	@ 0xC3;
static volatile unsigned char		CCL2	@ 0xC4;
static volatile unsigned char		CCH2	@ 0xC5;
static volatile unsigned char		CCL3	@ 0xC6;
static volatile unsigned char		CCH3	@ 0xC7;
static volatile	unsigned char		T2CON	@ 0xC8;
static volatile unsigned char		CRCL	@ 0xCA;
static volatile unsigned char		CRCH	@ 0xCB;
static volatile unsigned char		TL2	@ 0xCC;
static volatile unsigned char		TH2	@ 0xCD;
static volatile unsigned char		PSW	@ 0xD0;
static volatile unsigned char		ADCON0	@ 0xD8;
static volatile unsigned char		ADDATH	@ 0xD9;
static volatile unsigned char		ADDATL	@ 0xDA;
static volatile unsigned char		P6	@ 0xDB;
static		unsigned char		ADCON1	@ 0xDC;
static volatile unsigned char		ACC	@ 0xE0;
static volatile unsigned char		P4	@ 0xE8;
static volatile unsigned char		B	@ 0xF0;
static volatile unsigned char		P5	@ 0xF8;
// DIR1 SFR in mapped region
static volatile unsigned char		DIR5	@ 0xF8;
static volatile unsigned char		P7	@ 0xFA;
#if defined(_C515C_8R) || defined(_C515C_8L) || defined(_C515C_8E) 
static		unsigned char		VR0	@ 0xFC;
static		unsigned char		VR1	@ 0xFD;
static		unsigned char		VR2	@ 0xFE;
#endif

static volatile SFR_BITS	P0_BITS		@ 0x80;
static 		SFR_BITS	PCON_BITS	@ 0x87;
static volatile	SFR_BITS	TCON_BITS	@ 0x88;
// PCON1 SFR in mapped region
static volatile	SFR_BITS	PCON1_BITS	@ 0x88;
static 		SFR_BITS	TMOD_BITS	@ 0x89;
static volatile SFR_BITS	P1_BITS		@ 0x90;
static		SFR_BITS	DPSEL_BITS	@ 0x92;
static volatile	SFR_BITS	SSCCON_BITS	@ 0x93;
static volatile	SFR_BITS	SSCMOD_BITS	@ 0x96;
static volatile	SFR_BITS	SCON_BITS	@ 0x98;
static 		SFR_BITS	IEN2_BITS	@ 0x9A;
static volatile SFR_BITS	P2_BITS		@ 0xA0;
static 		SFR_BITS	IEN0_BITS	@ 0xA8;
static 		SFR_BITS	IP0_BITS	@ 0xA9;
static volatile	SFR_BITS	SCF_BITS	@ 0xAB;
static		SFR_BITS	SCIEN_BITS	@ 0xAC;
static volatile SFR_BITS	P3_BITS		@ 0xB0;
static volatile SFR_BITS	SYSCON_BITS	@ 0xB1;
static 		SFR_BITS	IEN1_BITS	@ 0xB8;
static 		SFR_BITS	IP1_BITS	@ 0xB9;
static volatile SFR_BITS	IRCON_BITS	@ 0xC0;
static		SFR_BITS	CCEN_BITS	@ 0xC1;
static volatile	SFR_BITS	T2CON_BITS	@ 0xC8;
static volatile SFR_BITS	PSW_BITS	@ 0xD0;
static volatile SFR_BITS	ADCON0_BITS	@ 0xD8;
static volatile	SFR_BITS	DAPR_BITS	@ 0xDA;
static volatile	SFR_BITS	P6_BITS		@ 0xDB;
static volatile SFR_BITS	ADCON1_BITS	@ 0xDC;
static volatile SFR_BITS	ACC_BITS	@ 0xE0;
static volatile SFR_BITS	P4_BITS		@ 0xE8;
static volatile SFR_BITS	B_BITS		@ 0xF0;
static volatile SFR_BITS	P5_BITS		@ 0xF8;
// DIR1 SFR in mapped region
static volatile SFR_BITS	DIR5_BITS	@ 0xF8;
static volatile SFR_BITS	P7_BITS		@ 0xFA;

/*bit addressable locations*/
//Port 0 P0
static volatile bit	P00	@ 0x80;
static volatile bit	P01	@ 0x81;
static volatile bit	P02	@ 0x82;
static volatile bit	P03	@ 0x83;
static volatile bit	P04	@ 0x84;
static volatile bit	P05	@ 0x85;
static volatile bit	P06	@ 0x86;
static volatile bit	P07	@ 0x87;
// Alternate Functions
static volatile bit	AD0	@ 0x80;
static volatile bit	AD1	@ 0x81;
static volatile bit	AD2	@ 0x82;
static volatile bit	AD3	@ 0x83;
static volatile bit	AD4	@ 0x84;
static volatile bit	AD5	@ 0x85;
static volatile bit	AD6	@ 0x86;
static volatile bit	AD7	@ 0x87;

//Timer Control TCON
static 		bit	IT0	@ 0x88;
static volatile bit	IE0	@ 0x89;
static 		bit	IT1	@ 0x8A;
static volatile bit	IE1	@ 0x8B;
static 		bit	TR0	@ 0x8C;
static volatile bit	TF0	@ 0x8D;
static 		bit	TR1	@ 0x8E;
static volatile bit	TF1	@ 0x8F;
//Power Control 1 PCON1
//this section is accessable if RMAP (SYSCON.4) is set
#if defined(_C515C_8E) 
static volatile bit	WS	@ 0x8C;
#endif
#if defined(_C515C_8R) || defined(_C515C_8L) || defined(_C515C_8E) 
static volatile bit	EWPD	@ 0x8F;
#endif

//Port 1 P1
static volatile bit	P10	@ 0x90;
static volatile bit	P11	@ 0x91;
static volatile bit	P12	@ 0x92;
static volatile bit	P13	@ 0x93;
static volatile bit	P14	@ 0x94;
static volatile bit	P15	@ 0x95;
static volatile bit	P16	@ 0x96;
static volatile bit	P17	@ 0x97;
// Alternate Functions
static volatile bit	INT3	@ 0x90;
static volatile bit	INT4	@ 0x91;
static volatile bit	INT5	@ 0x92;
static volatile bit	INT6	@ 0x93;
static volatile bit	INT2	@ 0x94;
static volatile bit	T2EX	@ 0x95;
static volatile bit	CLKOUT	@ 0x96;
static volatile bit	T2	@ 0x97;
static volatile bit	CC0	@ 0x90;
static volatile bit	CC1	@ 0x91;
static volatile bit	CC2	@ 0x92;
static volatile bit	CC3	@ 0x93;

//Serial Control SCON
static volatile bit	RI	@ 0x98;
static volatile bit	TI	@ 0x99;
static volatile bit	RB8	@ 0x9A;
static		bit	TB8	@ 0x9B;
static 		bit	REN	@ 0x9C;
static		bit	SM2	@ 0x9D;
static		bit	SM1	@ 0x9E;
static		bit	SM0	@ 0x9F;

//Port 2 P2
static volatile bit	P20	@ 0xA0;
static volatile bit	P21	@ 0xA1;
static volatile bit	P22	@ 0xA2;
static volatile bit	P23	@ 0xA3;
static volatile bit	P24	@ 0xA4;
static volatile bit	P25	@ 0xA5;
static volatile bit	P26	@ 0xA6;
static volatile bit	P27	@ 0xA7;
// Alternate Functions
static volatile bit	A8	@ 0xA0;
static volatile bit	A9	@ 0xA1;
static volatile bit	A10	@ 0xA2;
static volatile bit	A11	@ 0xA3;
static volatile bit	A12	@ 0xA4;
static volatile bit	A13	@ 0xA5;
static volatile bit	A14	@ 0xA6;
static volatile bit	A15	@ 0xA7;

//Interrupt Enable 0 IEN0
static		bit	EX0	@ 0xA8;
static		bit	ET0	@ 0xA9;
static		bit	EX1	@ 0xAA;
static		bit	ET1	@ 0xAB;
static 		bit	ES	@ 0xAC;
static 		bit	ET2	@ 0xAD;
static 		bit	WDT	@ 0xAE;
static 		bit	EAL	@ 0xAF;

//Port 3 P3
static volatile bit	P30	@ 0xB0;
static volatile bit	P31	@ 0xB1;
static volatile bit	P32	@ 0xB2;
static volatile bit	P33	@ 0xB3;
static volatile bit	P34	@ 0xB4;
static volatile bit	P35	@ 0xB5;
static volatile bit	P36	@ 0xB6;
static volatile bit	P37	@ 0xB7;
// Alternate Functions
static volatile bit	RXD	@ 0xB0;
static volatile bit	TXD	@ 0xB1;
static volatile bit	INT0	@ 0xB2;
static volatile bit	INT1	@ 0xB3;
static volatile bit	T0	@ 0xB4;
static volatile bit	T1	@ 0xB5;
static volatile bit	WR	@ 0xB6;
static volatile bit	RD	@ 0xB7;

//Interrupt Enable 1
static 		bit	EADC	@ 0xB8;
static 		bit	EX2	@ 0xB9;
static 		bit	EX3	@ 0xBA;
static 		bit	EX4	@ 0xBB;
static 		bit	EX5	@ 0xBC;
static 		bit	EX6	@ 0xBD;
static 		bit	SWDT	@ 0xBE;
static 		bit	EXEN2	@ 0xBF;

//Interrrupt Request Control Register IRCON
static volatile bit	IADC	@ 0xC0;
static volatile bit	IEX2	@ 0xC1;
static volatile bit	IEX3	@ 0xC2;
static volatile bit	IEX4	@ 0xC3;
static volatile bit	IEX5	@ 0xC4;
static volatile bit	IEX6	@ 0xC5;
static volatile bit	TF2	@ 0xC6;
static volatile bit	EXF2	@ 0xC7;

//Timer 2 Control T2CON
static volatile	bit	T2I0	@ 0xC8;
static volatile	bit	T2I1	@ 0xC9;
static volatile	bit	T2CM	@ 0xCA;
static volatile	bit	T2R0	@ 0xCB;
static volatile	bit	T2R1	@ 0xCC;
static volatile	bit	I2FR	@ 0xCD;
static volatile	bit	I3FR	@ 0xCE;
static volatile	bit	T2PS	@ 0xCF;

//Program Status Word PSW
static volatile bit	P	@ 0xD0;
static volatile bit	F1	@ 0xD1;
static volatile bit	OV	@ 0xD2;
static 		bit	RS0	@ 0xD3;
static 		bit	RS1	@ 0xD4;
static volatile bit	F0	@ 0xD5;
static volatile bit	AC	@ 0xD6;
static volatile bit	CY	@ 0xD7;

//AD Control 0 ADCDON0
static		bit	MX0	@ 0xD8;
static		bit	MX1	@ 0xD9;
static		bit	MX2	@ 0xDA;
static volatile	bit	ADM	@ 0xDB;
static volatile	bit	BSY	@ 0xDC;
static volatile bit	ADEX	@ 0xDD;
static volatile bit	CLK	@ 0xDE;
static volatile bit	BD	@ 0xDF;

//Accumulator ACC
static volatile bit	ACC0	@ 0xE0;
static volatile bit	ACC1	@ 0xE1;
static volatile bit	ACC2	@ 0xE2;
static volatile bit	ACC3	@ 0xE3;
static volatile bit	ACC4	@ 0xE4;
static volatile bit	ACC5	@ 0xE5;
static volatile bit	ACC6	@ 0xE6;
static volatile bit	ACC7	@ 0xE7;

//Port 4 P4
static volatile bit	P40	@ 0xE8;
static volatile bit	P41	@ 0xE9;
static volatile bit	P42	@ 0xEA;
static volatile bit	P43	@ 0xEB;
static volatile bit	P44	@ 0xEC;
static volatile bit	P45	@ 0xED;
static volatile bit	P46	@ 0xEE;
static volatile bit	P47	@ 0xEF;
// Alternate Functions
static volatile bit	ADST	@ 0xE8;
static volatile bit	SCLK	@ 0xE9;
static volatile bit	SRI	@ 0xEA;
static volatile bit	STO	@ 0xEB;
static volatile bit	SLS	@ 0xEC;
static volatile bit	INT8	@ 0xED;
static volatile bit	TXDC	@ 0xEE;
static volatile bit	RXDC	@ 0xEF;

//B register
static volatile bit	B0	@ 0xF0;
static volatile bit	B1	@ 0xF1;
static volatile bit	B2	@ 0xF2;
static volatile bit	B3	@ 0xF3;
static volatile bit	B4	@ 0xF4;
static volatile bit	B5	@ 0xF5;
static volatile bit	B6	@ 0xF6;
static volatile bit	B7	@ 0xF7;

//Port 5 P5
static volatile bit	P50	@ 0xF8;
static volatile bit	P51	@ 0xF9;
static volatile bit	P52	@ 0xFA;
static volatile bit	P53	@ 0xFB;
static volatile bit	P54	@ 0xFC;
static volatile bit	P55	@ 0xFD;
static volatile bit	P56	@ 0xFE;
static volatile bit	P57	@ 0xFF;
//Direction Port 5 DIR5
//this section is accessable if RMAP (SYSCON.4) is set
static volatile bit	DIR50	@ 0xF8;
static volatile bit	DIR51	@ 0xF9;
static volatile bit	DIR52	@ 0xFA;
static volatile bit	DIR53	@ 0xFB;
static volatile bit	DIR54	@ 0xFC;
static volatile bit	DIR55	@ 0xFD;
static volatile bit	DIR56	@ 0xFE;
static volatile bit	DIR57	@ 0xFF;

/*	Interrupt vectors */
#define	RESET	0
#define	EXTINT0	0x03
#define TIMER0	0x0B
#define	EXTINT1	0x13
#define	TIMER1	0x1B
#define	SERIAL	0x23
#define	TIMER2	0x2B
#define	ADC	0x43
#define	EXTINT2	0x4B
#define	EXTINT3	0x53
#define	EXTINT4	0x5B
#define	EXTINT5	0x63
#define	EXTINT6	0x6B
#define	WUPD	0x7B
#define	CAN	0x8B
#define	SSC	0x93
#define	EXTINT7	0xA3
#define	EXTINT8	0xAB

#endif
