
#ifndef	_HTC_H_
#warning Header file platnm50.h included directly. Use #include <htc.h> instead.
#endif


 /* header file for the Emosyn THESIUS(R) microcontrollers
	PLATINUM50
 */

#ifndef	__PLATNM50_H

#define	__PLATNM50_H

typedef struct {
	unsigned B7:1; //This is the most signifigant bit
	unsigned B6:1;
	unsigned B5:1;
	unsigned B4:1;
	unsigned B3:1;
	unsigned B2:1;
	unsigned B1:1;
	unsigned B0:1;
}	SFR_BITS;

//Special Function Registers
static volatile unsigned char SP	@ 0x81;
static volatile unsigned char DPL0	@ 0x82;
static volatile unsigned char DPH0	@ 0x83;
// 16-Bit definition
// Alternate definition
static volatile unsigned char DPL1	@ 0x84;
static volatile unsigned char DPH1	@ 0x85;
// 16-Bit definition
static          unsigned char DPS	@ 0x86;
static volatile unsigned char PCON	@ 0x87;
static volatile unsigned char MPTR	@ 0x92;
static volatile unsigned char SCON	@ 0x98;
static volatile unsigned char SBUF	@ 0x99;
static          unsigned char IE	@ 0xA8;
static volatile unsigned char SECSTA	@ 0xB0;
static volatile unsigned char ISOCON	@ 0xB2;
static		unsigned char ISOTMR	@ 0xB4;
static          unsigned char IP	@ 0xB8;
static volatile unsigned char PROGIO	@ 0xC0;
static		unsigned char CLKCON	@ 0xCE;
static volatile unsigned char CLKSEL	@ 0xCF;
static volatile unsigned char PSW	@ 0xD0;
static volatile unsigned char ACC	@ 0xE0;
static volatile unsigned char B		@ 0xF0;

static          SFR_BITS	 DPS_BITS	@ 0x86;
static volatile SFR_BITS	 PCON_BITS	@ 0x87;
static volatile SFR_BITS	 MPTR_BITS	@ 0x92;
static volatile SFR_BITS	 SCON_BITS	@ 0x98;
static          SFR_BITS	 IE_BITS	@ 0xA8;
static volatile SFR_BITS	 SECSTA_BITS	@ 0xB0;
static volatile SFR_BITS	 ISOCON_BITS	@ 0xB2;
static          SFR_BITS	 IP_BITS	@ 0xB8;
static volatile SFR_BITS	 PROGIO_BITS	@ 0xC0;
static		SFR_BITS	 CLKCON_BITS	@ 0xCE;
static volatile SFR_BITS	 CLKSEL_BITS	@ 0xCF;
static volatile SFR_BITS	 PSW_BITS	@ 0xD0;
static volatile SFR_BITS	 ACC_BITS	@ 0xE0;
static volatile SFR_BITS	 B_BITS		@ 0xF0;


// Bit Addressable Locations
// Serial Control SCON
static volatile bit	RI	@ 0x98;
static volatile bit	TI	@ 0x99;

// Interrupt Enable IE
static 		bit	ES	@ 0xAC;
static 		bit	EA	@ 0xAF;

// definitions for register SECSTA
static volatile bit	OVVOLT	@ 0xB0;
static volatile bit	UNVOLT	@ 0xB1;
static volatile bit	UVDET	@ 0xB2;
static volatile bit	UNFREQ	@ 0xB3;
static volatile bit	MEMVIO	@ 0xB4;
static volatile bit	ESOCVIO	@ 0xB5;
static volatile bit	TEMPER	@ 0xB6;
static volatile bit	FAULTINT @ 0xB7;

// Interrupt Priority
static 		bit	PS	@ 0xBC;

// definitions for register PROGIO
static		bit	CLKWRE	@ 0xC0;
static volatile bit	CLKWRT	@ 0xC1;
static		bit	DATWRE	@ 0xC2;
static volatile bit	DATWRT	@ 0xC3;
static volatile bit	CLKRD	@ 0xC4;
static volatile bit	DATRD	@ 0xC5;

// Program Status Word PSW
static volatile bit	P	@ 0xD0;
static volatile bit	F1	@ 0xD1;
static volatile bit	OV	@ 0xD2;
static 		bit	RS0	@ 0xD3;
static 		bit	RS1	@ 0xD4;
static volatile bit	F0	@ 0xD5;
static volatile bit	AC	@ 0xD6;
static volatile bit	CY	@ 0xD7;

// Accumulator ACC
static volatile bit	ACC0	@ 0xE0;
static volatile bit	ACC1	@ 0xE1;
static volatile bit	ACC2	@ 0xE2;
static volatile bit	ACC3	@ 0xE3;
static volatile bit	ACC4	@ 0xE4;
static volatile bit	ACC5	@ 0xE5;
static volatile bit	ACC6	@ 0xE6;
static volatile bit	ACC7	@ 0xE7;

// B register
static volatile bit	B0	@ 0xF0;
static volatile bit	B1	@ 0xF1;
static volatile bit	B2	@ 0xF2;
static volatile bit	B3	@ 0xF3;
static volatile bit	B4	@ 0xF4;
static volatile bit	B5	@ 0xF5;
static volatile bit	B6	@ 0xF6;
static volatile bit	B7	@ 0xF7;


// Interrupt Vectors
#define	RESET	0
#define	SECURITY 0x6813
#define	SERIAL	0x6823

#endif
